tmp_suning_uos_patched/arch/blackfin/kernel/cplb-mpu
Sonic Zhang f099f39acf Blackfin arch: Make L2 SRAM cacheable
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-10-09 14:11:57 +08:00
..
cacheinit.c Blackfin arch: mark some functions as __init as they are only called from __init functions 2008-08-14 14:35:20 +08:00
cplbinfo.c [Blackfin] arch: cplb-mpu code clean up 2008-04-24 05:44:32 +08:00
cplbinit.c Blackfin arch: Make L2 SRAM cacheable 2008-10-09 14:11:57 +08:00
cplbmgr.c Blackfin arch: fixing bug - under IRQ stress, running applications may wrongly trigger an ICPLB miss and be killed 2008-10-07 16:27:01 +08:00
Makefile