26297e1710
[ Upstream commit cc3283f8f41f741fbaef63d0503d8fb4a7919100 ]
The comment says the layout and options use 8 bits, and the shift
uses 8 bits. However the mask is 0xf, ie. 0b00001111 (4 bits).
This could be surprising when introducing new layouts or options
that take more than 4 bits, as this would silently drop the high
bits.
Make the masks consistent with the comment and the shift.
Found when writing a drm_info patch [1].
[1]: https://github.com/ascent12/drm_info/pull/67
Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes:
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.. | ||
amdgpu_drm.h | ||
armada_drm.h | ||
drm_fourcc.h | ||
drm_mode.h | ||
drm_sarea.h | ||
drm.h | ||
etnaviv_drm.h | ||
exynos_drm.h | ||
i810_drm.h | ||
i915_drm.h | ||
lima_drm.h | ||
mga_drm.h | ||
msm_drm.h | ||
nouveau_drm.h | ||
omap_drm.h | ||
panfrost_drm.h | ||
qxl_drm.h | ||
r128_drm.h | ||
radeon_drm.h | ||
savage_drm.h | ||
sis_drm.h | ||
tegra_drm.h | ||
v3d_drm.h | ||
vc4_drm.h | ||
vgem_drm.h | ||
via_drm.h | ||
virtgpu_drm.h | ||
vmwgfx_drm.h |