f23020230e
The coherentio variable has previously been used as a boolean value, indicating whether the user specified that coherent I/O should be enabled or disabled. It failed to take into account the case where the user does not specify any preference, in which case it makes sense that we should default to coherent I/O if the hardware supports it (hw_coherentio is non-zero). Introduce an enum to clarify the 3 different values of coherentio & use it throughout the code, modifying plat_device_is_coherent() & r4k_cache_init() to take into account the default case. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paul Burton <paul.burton@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/14347/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
95 lines
3.1 KiB
C
95 lines
3.1 KiB
C
/*
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* Copyright 2000, 2007-2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com
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*
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* Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <asm/dma-coherence.h>
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#include <asm/mipsregs.h>
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#include <au1000.h>
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extern void __init board_setup(void);
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extern void __init alchemy_set_lpj(void);
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void __init plat_mem_setup(void)
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{
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alchemy_set_lpj();
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if (au1xxx_cpu_needs_config_od())
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/* Various early Au1xx0 errata corrected by this */
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set_c0_config(1 << 19); /* Set Config[OD] */
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else
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/* Clear to obtain best system bus performance */
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clear_c0_config(1 << 19); /* Clear Config[OD] */
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hw_coherentio = 0;
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coherentio = IO_COHERENCE_ENABLED;
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switch (alchemy_get_cputype()) {
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case ALCHEMY_CPU_AU1000:
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case ALCHEMY_CPU_AU1500:
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case ALCHEMY_CPU_AU1100:
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coherentio = IO_COHERENCE_DISABLED;
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break;
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case ALCHEMY_CPU_AU1200:
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/* Au1200 AB USB does not support coherent memory */
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if (0 == (read_c0_prid() & PRID_REV_MASK))
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coherentio = IO_COHERENCE_DISABLED;
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break;
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}
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board_setup(); /* board specific setup */
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/* IO/MEM resources. */
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set_io_port_base(0);
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ioport_resource.start = IOPORT_RESOURCE_START;
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ioport_resource.end = IOPORT_RESOURCE_END;
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iomem_resource.start = IOMEM_RESOURCE_START;
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iomem_resource.end = IOMEM_RESOURCE_END;
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}
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#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_PCI)
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/* This routine should be valid for all Au1x based boards */
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phys_addr_t __fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
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{
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unsigned long start = ALCHEMY_PCI_MEMWIN_START;
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unsigned long end = ALCHEMY_PCI_MEMWIN_END;
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/* Don't fixup 36-bit addresses */
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if ((phys_addr >> 32) != 0)
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return phys_addr;
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/* Check for PCI memory window */
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if (phys_addr >= start && (phys_addr + size - 1) <= end)
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return (phys_addr_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
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/* default nop */
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return phys_addr;
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}
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EXPORT_SYMBOL(__fixup_bigphys_addr);
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#endif
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