9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
447 lines
10 KiB
C
447 lines
10 KiB
C
/*
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* include/asm-xtensa/bitops.h
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*
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* Atomic operations that C can't guarantee us.Useful for resource counting etc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_BITOPS_H
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#define _XTENSA_BITOPS_H
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#ifdef __KERNEL__
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#include <asm/processor.h>
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#include <asm/byteorder.h>
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#include <asm/system.h>
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#ifdef CONFIG_SMP
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# error SMP not supported on this architecture
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#endif
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static __inline__ void set_bit(int nr, volatile void * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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*a |= mask;
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local_irq_restore(flags);
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}
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static __inline__ void __set_bit(int nr, volatile unsigned long * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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*a |= mask;
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}
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static __inline__ void clear_bit(int nr, volatile void * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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*a &= ~mask;
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local_irq_restore(flags);
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}
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static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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*a &= ~mask;
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}
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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static __inline__ void change_bit(int nr, volatile void * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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*a ^= mask;
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local_irq_restore(flags);
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}
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static __inline__ void __change_bit(int nr, volatile void * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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*a ^= mask;
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}
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static __inline__ int test_and_set_bit(int nr, volatile void * addr)
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{
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unsigned long retval;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a |= mask;
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local_irq_restore(flags);
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return retval;
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}
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static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
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{
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unsigned long retval;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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retval = (mask & *a) != 0;
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*a |= mask;
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return retval;
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}
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static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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{
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unsigned long retval;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a &= ~mask;
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local_irq_restore(flags);
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return retval;
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}
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static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *a;
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*a = old & ~mask;
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return (old & mask) != 0;
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}
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static __inline__ int test_and_change_bit(int nr, volatile void * addr)
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{
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unsigned long retval;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long flags;
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a ^= mask;
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local_irq_restore(flags);
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return retval;
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}
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/*
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* non-atomic version; can be reordered
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*/
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static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *a = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *a;
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*a = old ^ mask;
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return (old & mask) != 0;
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}
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static __inline__ int test_bit(int nr, const volatile void *addr)
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{
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return 1UL & (((const volatile unsigned int *)addr)[nr>>5] >> (nr&31));
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}
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#if XCHAL_HAVE_NSAU
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static __inline__ int __cntlz (unsigned long x)
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{
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int lz;
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asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
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return 31 - lz;
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}
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#else
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static __inline__ int __cntlz (unsigned long x)
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{
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unsigned long sum, x1, x2, x4, x8, x16;
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x1 = x & 0xAAAAAAAA;
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x2 = x & 0xCCCCCCCC;
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x4 = x & 0xF0F0F0F0;
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x8 = x & 0xFF00FF00;
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x16 = x & 0xFFFF0000;
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sum = x2 ? 2 : 0;
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sum += (x16 != 0) * 16;
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sum += (x8 != 0) * 8;
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sum += (x4 != 0) * 4;
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sum += (x1 != 0);
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return sum;
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}
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#endif
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/*
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* ffz: Find first zero in word. Undefined if no zero exists.
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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static __inline__ int ffz(unsigned long x)
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{
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if ((x = ~x) == 0)
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return 32;
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return __cntlz(x & -x);
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}
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/*
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* __ffs: Find first bit set in word. Return 0 for bit 0
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*/
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static __inline__ int __ffs(unsigned long x)
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{
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return __cntlz(x & -x);
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}
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/*
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* ffs: Find first bit set in word. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(unsigned long x)
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{
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return __cntlz(x & -x) + 1;
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}
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/*
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* fls: Find last (most-significant) bit set in word.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static __inline__ int fls (unsigned int x)
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{
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return __cntlz(x);
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}
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static __inline__ int
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find_next_bit(const unsigned long *addr, int size, int offset)
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{
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const unsigned long *p = addr + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if (offset) {
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tmp = *p++;
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tmp &= ~0UL << offset;
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if (size < 32)
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goto found_first;
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if (tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while (size >= 32) {
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if ((tmp = *p++) != 0)
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp &= ~0UL >> (32 - size);
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if (tmp == 0UL) /* Are any bits set? */
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return result + size; /* Nope. */
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found_middle:
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return result + __ffs(tmp);
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}
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/**
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_bit(addr, size) \
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find_next_bit((addr), (size), 0)
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static __inline__ int
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find_next_zero_bit(const unsigned long *addr, int size, int offset)
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{
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const unsigned long *p = addr + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if (offset) {
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tmp = *p++;
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tmp |= ~0UL >> (32-offset);
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if (size < 32)
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goto found_first;
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if (~tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while (size & ~31UL) {
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if (~(tmp = *p++))
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp |= ~0UL << size;
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found_middle:
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return result + ffz(tmp);
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}
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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#ifdef __XTENSA_EL__
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# define ext2_set_bit(nr,addr) __test_and_set_bit((nr), (addr))
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr),(addr))
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# define ext2_clear_bit(nr,addr) __test_and_clear_bit((nr), (addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr),(addr))
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# define ext2_test_bit(nr,addr) test_bit((nr), (addr))
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# define ext2_find_first_zero_bit(addr, size) find_first_zero_bit((addr),(size))
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# define ext2_find_next_zero_bit(addr, size, offset) \
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find_next_zero_bit((addr), (size), (offset))
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#elif defined(__XTENSA_EB__)
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# define ext2_set_bit(nr,addr) __test_and_set_bit((nr) ^ 0x18, (addr))
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr) ^ 0x18, (addr))
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# define ext2_clear_bit(nr,addr) __test_and_clear_bit((nr) ^ 18, (addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr)^0x18,(addr))
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# define ext2_test_bit(nr,addr) test_bit((nr) ^ 0x18, (addr))
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# define ext2_find_first_zero_bit(addr, size) \
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ext2_find_next_zero_bit((addr), (size), 0)
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static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
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{
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unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
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unsigned long result = offset & ~31UL;
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if(offset) {
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/* We hold the little endian value in tmp, but then the
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* shift is illegal. So we could keep a big endian value
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* in tmp, like this:
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*
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* tmp = __swab32(*(p++));
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* tmp |= ~0UL >> (32-offset);
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*
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* but this would decrease preformance, so we change the
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* shift:
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*/
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tmp = *(p++);
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tmp |= __swab32(~0UL >> (32-offset));
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if(size < 32)
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goto found_first;
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if(~tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while(size & ~31UL) {
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if(~(tmp = *(p++)))
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if(!size)
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return result;
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tmp = *p;
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found_first:
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/* tmp is little endian, so we would have to swab the shift,
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* see above. But then we have to swab tmp below for ffz, so
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* we might as well do this here.
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*/
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return result + ffz(__swab32(tmp) | (~0UL << size));
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found_middle:
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return result + ffz(__swab32(tmp));
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}
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#else
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# error processor byte order undefined!
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#endif
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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/*
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* Find the first bit set in a 140-bit bitmap.
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* The first 100 bits are unlikely to be set.
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*/
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static inline int sched_find_first_bit(const unsigned long *b)
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{
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 32;
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if (unlikely(b[2]))
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return __ffs(b[2]) + 64;
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if (b[3])
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return __ffs(b[3]) + 96;
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return __ffs(b[4]) + 128;
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}
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/* Bitmap functions for the minix filesystem. */
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#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
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#define minix_set_bit(nr,addr) set_bit(nr,addr)
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#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
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#define minix_test_bit(nr,addr) test_bit(nr,addr)
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#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_BITOPS_H */
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