tmp_suning_uos_patched/drivers/ntb
Serge Semin 37a3e9693d ntb: idt: Set PCIe bus address to BARLIMITx
IDT NTB driver sets the upper limit of actual translation address
being written to the corresponding memory window setup. It is achieved
by BARLIMITx register initialization. Needless to say, that the register
works within PCIe bus address space.

In general CPU and PCIe address spaces are different. It means,
that addresses used for Memory TLPs routine can be different from
CPU addresses. While in most of cases they are the same, there are
exceptions when the proper mapping must be performed to have the
portable driver code. There used to be a virt_to_bus()/bus_to_virt()
interface for this purpose. But it's deprecated now. It was also a
mistake to use pci_resource_start() since the return address of the
method is at the CPU address space. In order to achieve the desired
purpose we need to use pci_bus_address() helper. This method shall
return a PCIe bus base address of the corresponding BAR resource.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Allen Hubbe <allenbh@gmail.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
2018-10-31 21:20:05 -04:00
..
hw ntb: idt: Set PCIe bus address to BARLIMITx 2018-10-31 21:20:05 -04:00
test NTB: ntb_perf: fix cast to restricted __le32 2018-01-28 22:17:24 -05:00
Kconfig NTB: Add ping pong test client 2015-07-04 14:07:42 -04:00
Makefile NTB: Add ping pong test client 2015-07-04 14:07:42 -04:00
ntb_transport.c - Error path bug fix for overflow tests (Dan) 2018-06-12 18:28:00 -07:00
ntb.c NTB: Set dma mask and dma coherent mask to NTB devices 2018-01-28 22:17:23 -05:00