Will Deacon 37f47e3d62 ARM: 7658/1: mm: fix race updating mm->context.id on ASID rollover ... If a thread triggers an ASID rollover, other threads of the same process must be made to wait until the mm->context.id for the shared mm_struct has been updated to new generation and associated book-keeping (e.g. TLB invalidation) has ben performed. However, there is a *tiny* window where both mm->context.id and the relevant active_asids entry are updated to the new generation, but the TLB flush has not been performed, which could allow another thread to return to userspace with a dirty TLB, potentially leading to data corruption. In reality this will never occur because one CPU would need to perform a context-switch in the time it takes another to do a couple of atomic test/set operations but we should plug the race anyway. This patch moves the active_asids update until after the potential TLB flush on context-switch. Cc: <stable@vger.kernel.org> # 3.8 Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2013-03-03 22:54:13 +00:00
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abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c	ARM: fix scheduling while atomic warning in alignment handling code	2013-02-25 16:10:42 +00:00
cache-aurora-l2.h
cache-fa.S
cache-feroceon-l2.c
cache-l2x0.c	ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel	2013-01-07 15:04:17 +00:00
cache-tauros2.c
cache-v3.S
cache-v4.S
cache-v4wb.S
cache-v4wt.S
cache-v6.S
cache-v7.S	arm: Add v7_invalidate_l1 to cache-v7.S	2013-02-11 19:37:24 -08:00
cache-xsc3l2.c
context.c	ARM: 7658/1: mm: fix race updating mm->context.id on ASID rollover	2013-03-03 22:54:13 +00:00
copypage-fa.c
copypage-feroceon.c
copypage-v4mc.c
copypage-v4wb.c
copypage-v4wt.c
copypage-v6.c
copypage-xsc3.c
copypage-xscale.c
dma-mapping.c	ARM: DMA-mapping: fix memory leak in IOMMU dma-mapping implementation	2013-02-25 15:30:44 +01:00
extable.c
fault-armv.c
fault.c
fault.h
flush.c
fsr-2level.c
fsr-3level.c
highmem.c
idmap.c	ARM: Section based HYP idmap	2013-01-23 13:29:09 -05:00
init.c
iomap.c
ioremap.c	ARM: 7646/1: mm: use static_vm for managing static mapped areas	2013-02-16 17:54:22 +00:00
Kconfig	ARM: virt: hide CONFIG_ARM_VIRT_EXT from user	2013-01-10 21:09:33 +00:00
Makefile	ARM: 7644/1: vmregion: remove vmregion code entirely	2013-02-16 17:54:21 +00:00
mm.h	ARM: 7645/1: ioremap: introduce an infrastructure for static mapped area	2013-02-16 17:54:22 +00:00
mmap.c	Merge branch 'akpm' (Andrew's patchbomb)	2012-12-11 18:05:37 -08:00
mmu.c	Merge branch 'for-linus-2' of git://git.linaro.org/people/rmk/linux-arm	2013-02-20 14:29:37 -08:00
nommu.c
pabort-legacy.S
pabort-v6.S
pabort-v7.S
pgd.c
proc-arm7tdmi.S
proc-arm9tdmi.S
proc-arm720.S
proc-arm740.S
proc-arm920.S
proc-arm922.S
proc-arm925.S
proc-arm926.S
proc-arm940.S
proc-arm946.S
proc-arm1020.S
proc-arm1020e.S
proc-arm1022.S
proc-arm1026.S
proc-fa526.S
proc-feroceon.S
proc-macros.S	ARM: 7649/1: mm: mm->context.id fix for big-endian	2013-02-16 17:54:26 +00:00
proc-mohawk.S
proc-sa110.S
proc-sa1100.S
proc-syms.c
proc-v6.S	ARM: 7650/1: mm: replace direct access to mm->context.id with new macro	2013-02-16 17:54:27 +00:00
proc-v7-2level.S	ARM: 7650/1: mm: replace direct access to mm->context.id with new macro	2013-02-16 17:54:27 +00:00
proc-v7-3level.S	ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id	2013-03-03 22:54:12 +00:00
proc-v7.S	ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b	2013-01-06 17:54:08 +00:00
proc-xsc3.S
proc-xscale.S
tlb-fa.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S