f8060f5446
This creates irqchip initialization infrastructure from Thomas Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips and adapted to use the new infrastructure. All DT enabled platforms using GIC and VIC are converted over to use the new irqchip_init. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJQ8ZobAAoJEMhvYp4jgsXiihIH/2VvxmSHZb0e3jN6AR0B42b7 9EwX0IE0B23t91hNTwdzzmTJQYA7pMmWkgHNfd3vIeqSepJAmrVv/gp4iM9CtPwE KNh+kDWOK2ZsOH4Vb0lYRJHN8WQOIQHuCUr9+MdYLNOgf/pPL6G/Y9kv9A1e7fTC W+tFRjC5N1ilZMGyowX12L1wnwDk6kHzed6YV6bskC17cZ9/pg8PhSVbM4A/3kAv NXYKqbXJb+eCsWGXg/knZXOL6V9gBwvVYoe4O9X3nQ0226AWB9caad8l8tchAjRB fmrYF1tbkpOWPnLxhvQy5b5MJichJgTMJHh7RgiEcc/3f63kOljjlx4QKiqHvT0= =q7gm -----END PGP SIGNATURE----- Merge tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux into next/cleanup From Rob Herring: Initial irqchip init infrastructure and GIC and VIC clean-ups This creates irqchip initialization infrastructure from Thomas Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips and adapted to use the new infrastructure. All DT enabled platforms using GIC and VIC are converted over to use the new irqchip_init. * tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux: irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h ARM: picoxcell: use common irqchip_init function ARM: spear: use common irqchip_init function irqchip: Move ARM VIC to drivers/irqchip ARM: samsung: remove unused tick.h ARM: remove unneeded vic.h includes ARM: remove mach .handle_irq for VIC users ARM: VIC: set handle_arch_irq in VIC initialization ARM: VIC: shrink down vic.h irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h ARM: use common irqchip_init for GIC init irqchip: Move ARM GIC to drivers/irqchip ARM: remove mach .handle_irq for GIC users ARM: GIC: set handle_arch_irq in GIC initialization ARM: GIC: remove direct use of gic_raise_softirq ARM: GIC: remove assembly ifdefs from gic.h ARM: mach-ux500: use SGI0 to wake up the other core arm: add set_handle_irq() to register the parent IRQ controller handler function irqchip: add basic infrastructure irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS Fixed up massive merge conflicts with the timer cleanup due to adjacent changes: Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-bcm/board_bcm.c arch/arm/mach-cns3xxx/cns3420vb.c arch/arm/mach-ep93xx/adssphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/simone.c arch/arm/mach-ep93xx/snappercl15.c arch/arm/mach-ep93xx/ts72xx.c arch/arm/mach-ep93xx/vision_ep9307.c arch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-msm/board-dt-8960.c arch/arm/mach-netx/nxdb500.c arch/arm/mach-netx/nxdkn.c arch/arm/mach-netx/nxeb500hmi.c arch/arm/mach-nomadik/board-nhk8815.c arch/arm/mach-picoxcell/common.c arch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c arch/arm/mach-realview/realview_pba8.c arch/arm/mach-realview/realview_pbx.c arch/arm/mach-socfpga/socfpga.c arch/arm/mach-spear13xx/spear1310.c arch/arm/mach-spear13xx/spear1340.c arch/arm/mach-spear13xx/spear13xx.c arch/arm/mach-spear3xx/spear300.c arch/arm/mach-spear3xx/spear310.c arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear3xx/spear3xx.c arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-u300/core.c arch/arm/mach-ux500/board-mop500.c arch/arm/mach-ux500/cpu-db8500.c arch/arm/mach-versatile/versatile_ab.c arch/arm/mach-versatile/versatile_dt.c arch/arm/mach-versatile/versatile_pb.c arch/arm/mach-vexpress/v2m.c include/asm-generic/vmlinux.lds.h
263 lines
5.7 KiB
C
263 lines
5.7 KiB
C
/*
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* arch/arm/mach-spear3xx/spear310.c
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*
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* SPEAr310 machine source file
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*
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* Copyright (C) 2009-2012 ST Microelectronics
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* Viresh Kumar <viresh.linux@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) "SPEAr310: " fmt
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#include <linux/amba/pl08x.h>
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#include <linux/amba/serial.h>
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#include <linux/irqchip.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <mach/generic.h>
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#include <mach/spear.h>
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#define SPEAR310_UART1_BASE UL(0xB2000000)
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#define SPEAR310_UART2_BASE UL(0xB2080000)
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#define SPEAR310_UART3_BASE UL(0xB2100000)
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#define SPEAR310_UART4_BASE UL(0xB2180000)
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#define SPEAR310_UART5_BASE UL(0xB2200000)
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/* DMAC platform data's slave info */
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struct pl08x_channel_data spear310_dma_info[] = {
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{
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.bus_id = "uart0_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart0_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp0_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp0_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "irda",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "adc",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "to_jpeg",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "from_jpeg",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart1_rx",
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.min_signal = 0,
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.max_signal = 0,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart1_tx",
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.min_signal = 1,
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.max_signal = 1,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart2_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart2_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart3_rx",
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.min_signal = 4,
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.max_signal = 4,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart3_tx",
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.min_signal = 5,
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.max_signal = 5,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart4_rx",
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.min_signal = 6,
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.max_signal = 6,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart4_tx",
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.min_signal = 7,
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.max_signal = 7,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart5_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart5_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras5_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras5_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras6_rx",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras6_tx",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras7_rx",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras7_tx",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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},
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};
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/* uart devices plat data */
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static struct amba_pl011_data spear310_uart_data[] = {
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{
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart1_tx",
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.dma_rx_param = "uart1_rx",
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}, {
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart2_tx",
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.dma_rx_param = "uart2_rx",
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}, {
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart3_tx",
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.dma_rx_param = "uart3_rx",
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}, {
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart4_tx",
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.dma_rx_param = "uart4_rx",
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}, {
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.dma_filter = pl08x_filter_id,
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.dma_tx_param = "uart5_tx",
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.dma_rx_param = "uart5_rx",
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},
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};
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/* Add SPEAr310 auxdata to pass platform data */
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static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
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&pl022_plat_data),
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OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
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&pl080_plat_data),
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OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
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&spear310_uart_data[0]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL,
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&spear310_uart_data[1]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL,
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&spear310_uart_data[2]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL,
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&spear310_uart_data[3]),
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OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL,
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&spear310_uart_data[4]),
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{}
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};
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static void __init spear310_dt_init(void)
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{
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pl080_plat_data.slave_channels = spear310_dma_info;
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pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info);
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of_platform_populate(NULL, of_default_bus_match_table,
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spear310_auxdata_lookup, NULL);
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}
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static const char * const spear310_dt_board_compat[] = {
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"st,spear310",
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"st,spear310-evb",
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NULL,
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};
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static void __init spear310_map_io(void)
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{
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spear3xx_map_io();
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}
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DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
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.map_io = spear310_map_io,
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.init_irq = irqchip_init,
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.init_time = spear3xx_timer_init,
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.init_machine = spear310_dt_init,
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.restart = spear_restart,
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.dt_compat = spear310_dt_board_compat,
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MACHINE_END
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