2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
138 lines
2.7 KiB
C
138 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* sc520_freq.c: cpufreq driver for the AMD Elan sc520
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*
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* Copyright (C) 2005 Sean Young <sean@mess.org>
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*
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* Based on elanfreq.c
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*
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* 2005-03-30: - initial revision
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/cpufreq.h>
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#include <linux/timex.h>
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#include <linux/io.h>
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#include <asm/cpu_device_id.h>
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#include <asm/msr.h>
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#define MMCR_BASE 0xfffef000 /* The default base address */
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#define OFFS_CPUCTL 0x2 /* CPU Control Register */
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static __u8 __iomem *cpuctl;
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static struct cpufreq_frequency_table sc520_freq_table[] = {
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{0, 0x01, 100000},
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{0, 0x02, 133000},
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{0, 0, CPUFREQ_TABLE_END},
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};
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static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
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{
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u8 clockspeed_reg = *cpuctl;
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switch (clockspeed_reg & 0x03) {
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default:
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pr_err("error: cpuctl register has unexpected value %02x\n",
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clockspeed_reg);
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case 0x01:
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return 100000;
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case 0x02:
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return 133000;
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}
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}
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static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
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{
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u8 clockspeed_reg;
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local_irq_disable();
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clockspeed_reg = *cpuctl & ~0x03;
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*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;
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local_irq_enable();
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return 0;
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}
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/*
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* Module init and exit code
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*/
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static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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/* capability check */
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if (c->x86_vendor != X86_VENDOR_AMD ||
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c->x86 != 4 || c->x86_model != 9)
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return -ENODEV;
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/* cpuinfo and default policy values */
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policy->cpuinfo.transition_latency = 1000000; /* 1ms */
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policy->freq_table = sc520_freq_table;
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return 0;
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}
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static struct cpufreq_driver sc520_freq_driver = {
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.get = sc520_freq_get_cpu_frequency,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = sc520_freq_target,
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.init = sc520_freq_cpu_init,
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.name = "sc520_freq",
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.attr = cpufreq_generic_attr,
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};
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static const struct x86_cpu_id sc520_ids[] = {
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{ X86_VENDOR_AMD, 4, 9 },
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
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static int __init sc520_freq_init(void)
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{
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int err;
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if (!x86_match_cpu(sc520_ids))
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return -ENODEV;
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cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
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if (!cpuctl) {
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pr_err("sc520_freq: error: failed to remap memory\n");
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return -ENOMEM;
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}
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err = cpufreq_register_driver(&sc520_freq_driver);
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if (err)
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iounmap(cpuctl);
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return err;
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}
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static void __exit sc520_freq_exit(void)
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{
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cpufreq_unregister_driver(&sc520_freq_driver);
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iounmap(cpuctl);
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}
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Sean Young <sean@mess.org>");
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MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
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module_init(sc520_freq_init);
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module_exit(sc520_freq_exit);
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