3cfe54b96c
Apply const prefix to each possible place: the string arrays and the static tables for volumes. Just for minor optimization and no functional changes. Link: https://lore.kernel.org/r/20200105144823.29547-25-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
579 lines
17 KiB
C
579 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Digigram miXart soundcards
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*
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* DSP firmware management
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*
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* Copyright (c) 2003 by Digigram <alsa@digigram.com>
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*/
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/firmware.h>
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#include <linux/vmalloc.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include "mixart.h"
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#include "mixart_mixer.h"
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#include "mixart_core.h"
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#include "mixart_hwdep.h"
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/**
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* wait for a value on a peudo register, exit with a timeout
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*
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* @mgr: pointer to miXart manager structure
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* @offset: unsigned pseudo_register base + offset of value
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* @is_egal: wait for the equal value
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* @value: value
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* @timeout: timeout in centisenconds
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*/
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static int mixart_wait_nice_for_register_value(struct mixart_mgr *mgr,
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u32 offset, int is_egal,
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u32 value, unsigned long timeout)
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{
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unsigned long end_time = jiffies + (timeout * HZ / 100);
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u32 read;
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do { /* we may take too long time in this loop.
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* so give controls back to kernel if needed.
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*/
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cond_resched();
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read = readl_be( MIXART_MEM( mgr, offset ));
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if(is_egal) {
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if(read == value) return 0;
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}
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else { /* wait for different value */
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if(read != value) return 0;
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}
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} while ( time_after_eq(end_time, jiffies) );
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return -EBUSY;
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}
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/*
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structures needed to upload elf code packets
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*/
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struct snd_mixart_elf32_ehdr {
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u8 e_ident[16];
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__be16 e_type;
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__be16 e_machine;
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__be32 e_version;
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__be32 e_entry;
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__be32 e_phoff;
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__be32 e_shoff;
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__be32 e_flags;
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__be16 e_ehsize;
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__be16 e_phentsize;
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__be16 e_phnum;
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__be16 e_shentsize;
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__be16 e_shnum;
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__be16 e_shstrndx;
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};
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struct snd_mixart_elf32_phdr {
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__be32 p_type;
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__be32 p_offset;
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__be32 p_vaddr;
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__be32 p_paddr;
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__be32 p_filesz;
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__be32 p_memsz;
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__be32 p_flags;
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__be32 p_align;
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};
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static int mixart_load_elf(struct mixart_mgr *mgr, const struct firmware *dsp )
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{
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char elf32_magic_number[4] = {0x7f,'E','L','F'};
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struct snd_mixart_elf32_ehdr *elf_header;
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int i;
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elf_header = (struct snd_mixart_elf32_ehdr *)dsp->data;
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for( i=0; i<4; i++ )
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if ( elf32_magic_number[i] != elf_header->e_ident[i] )
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return -EINVAL;
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if( elf_header->e_phoff != 0 ) {
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struct snd_mixart_elf32_phdr elf_programheader;
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for( i=0; i < be16_to_cpu(elf_header->e_phnum); i++ ) {
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u32 pos = be32_to_cpu(elf_header->e_phoff) + (u32)(i * be16_to_cpu(elf_header->e_phentsize));
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memcpy( &elf_programheader, dsp->data + pos, sizeof(elf_programheader) );
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if(elf_programheader.p_type != 0) {
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if( elf_programheader.p_filesz != 0 ) {
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memcpy_toio( MIXART_MEM( mgr, be32_to_cpu(elf_programheader.p_vaddr)),
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dsp->data + be32_to_cpu( elf_programheader.p_offset ),
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be32_to_cpu( elf_programheader.p_filesz ));
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}
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}
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}
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}
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return 0;
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}
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/*
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* get basic information and init miXart
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*/
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/* audio IDs for request to the board */
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#define MIXART_FIRST_ANA_AUDIO_ID 0
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#define MIXART_FIRST_DIG_AUDIO_ID 8
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static int mixart_enum_connectors(struct mixart_mgr *mgr)
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{
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u32 k;
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int err;
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struct mixart_msg request;
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struct mixart_enum_connector_resp *connector;
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struct mixart_audio_info_req *audio_info_req;
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struct mixart_audio_info_resp *audio_info;
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connector = kmalloc(sizeof(*connector), GFP_KERNEL);
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audio_info_req = kmalloc(sizeof(*audio_info_req), GFP_KERNEL);
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audio_info = kmalloc(sizeof(*audio_info), GFP_KERNEL);
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if (! connector || ! audio_info_req || ! audio_info) {
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err = -ENOMEM;
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goto __error;
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}
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audio_info_req->line_max_level = MIXART_FLOAT_P_22_0_TO_HEX;
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audio_info_req->micro_max_level = MIXART_FLOAT_M_20_0_TO_HEX;
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audio_info_req->cd_max_level = MIXART_FLOAT____0_0_TO_HEX;
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request.message_id = MSG_SYSTEM_ENUM_PLAY_CONNECTOR;
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request.uid = (struct mixart_uid){0,0}; /* board num = 0 */
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request.data = NULL;
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request.size = 0;
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err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector);
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if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) {
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dev_err(&mgr->pci->dev,
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"error MSG_SYSTEM_ENUM_PLAY_CONNECTOR\n");
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err = -EINVAL;
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goto __error;
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}
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for(k=0; k < connector->uid_count; k++) {
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struct mixart_pipe *pipe;
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if(k < MIXART_FIRST_DIG_AUDIO_ID) {
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pipe = &mgr->chip[k/2]->pipe_out_ana;
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} else {
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pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_out_dig;
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}
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if(k & 1) {
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pipe->uid_right_connector = connector->uid[k]; /* odd */
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} else {
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pipe->uid_left_connector = connector->uid[k]; /* even */
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}
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/* dev_dbg(&mgr->pci->dev, "playback connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */
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/* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */
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request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO;
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request.uid = connector->uid[k];
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request.data = audio_info_req;
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request.size = sizeof(*audio_info_req);
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err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info);
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if( err < 0 ) {
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dev_err(&mgr->pci->dev,
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"error MSG_CONNECTOR_GET_AUDIO_INFO\n");
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goto __error;
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}
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/*dev_dbg(&mgr->pci->dev, "play analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/
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}
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request.message_id = MSG_SYSTEM_ENUM_RECORD_CONNECTOR;
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request.uid = (struct mixart_uid){0,0}; /* board num = 0 */
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request.data = NULL;
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request.size = 0;
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err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector);
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if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) {
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dev_err(&mgr->pci->dev,
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"error MSG_SYSTEM_ENUM_RECORD_CONNECTOR\n");
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err = -EINVAL;
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goto __error;
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}
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for(k=0; k < connector->uid_count; k++) {
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struct mixart_pipe *pipe;
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if(k < MIXART_FIRST_DIG_AUDIO_ID) {
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pipe = &mgr->chip[k/2]->pipe_in_ana;
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} else {
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pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_in_dig;
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}
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if(k & 1) {
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pipe->uid_right_connector = connector->uid[k]; /* odd */
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} else {
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pipe->uid_left_connector = connector->uid[k]; /* even */
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}
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/* dev_dbg(&mgr->pci->dev, "capture connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */
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/* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */
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request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO;
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request.uid = connector->uid[k];
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request.data = audio_info_req;
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request.size = sizeof(*audio_info_req);
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err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info);
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if( err < 0 ) {
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dev_err(&mgr->pci->dev,
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"error MSG_CONNECTOR_GET_AUDIO_INFO\n");
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goto __error;
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}
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/*dev_dbg(&mgr->pci->dev, "rec analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/
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}
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err = 0;
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__error:
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kfree(connector);
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kfree(audio_info_req);
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kfree(audio_info);
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return err;
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}
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static int mixart_enum_physio(struct mixart_mgr *mgr)
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{
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u32 k;
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int err;
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struct mixart_msg request;
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struct mixart_uid get_console_mgr;
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struct mixart_return_uid console_mgr;
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struct mixart_uid_enumeration phys_io;
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/* get the uid for the console manager */
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get_console_mgr.object_id = 0;
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get_console_mgr.desc = MSG_CONSOLE_MANAGER | 0; /* cardindex = 0 */
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request.message_id = MSG_CONSOLE_GET_CLOCK_UID;
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request.uid = get_console_mgr;
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request.data = &get_console_mgr;
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request.size = sizeof(get_console_mgr);
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err = snd_mixart_send_msg(mgr, &request, sizeof(console_mgr), &console_mgr);
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if( (err < 0) || (console_mgr.error_code != 0) ) {
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dev_dbg(&mgr->pci->dev,
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"error MSG_CONSOLE_GET_CLOCK_UID : err=%x\n",
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console_mgr.error_code);
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return -EINVAL;
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}
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/* used later for clock issues ! */
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mgr->uid_console_manager = console_mgr.uid;
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request.message_id = MSG_SYSTEM_ENUM_PHYSICAL_IO;
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request.uid = (struct mixart_uid){0,0};
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request.data = &console_mgr.uid;
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request.size = sizeof(console_mgr.uid);
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err = snd_mixart_send_msg(mgr, &request, sizeof(phys_io), &phys_io);
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if( (err < 0) || ( phys_io.error_code != 0 ) ) {
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dev_err(&mgr->pci->dev,
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"error MSG_SYSTEM_ENUM_PHYSICAL_IO err(%x) error_code(%x)\n",
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err, phys_io.error_code);
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return -EINVAL;
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}
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/* min 2 phys io per card (analog in + analog out) */
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if (phys_io.nb_uid < MIXART_MAX_CARDS * 2)
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return -EINVAL;
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for(k=0; k<mgr->num_cards; k++) {
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mgr->chip[k]->uid_in_analog_physio = phys_io.uid[k];
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mgr->chip[k]->uid_out_analog_physio = phys_io.uid[phys_io.nb_uid/2 + k];
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}
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return 0;
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}
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static int mixart_first_init(struct mixart_mgr *mgr)
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{
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u32 k;
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int err;
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struct mixart_msg request;
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if((err = mixart_enum_connectors(mgr)) < 0) return err;
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if((err = mixart_enum_physio(mgr)) < 0) return err;
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/* send a synchro command to card (necessary to do this before first MSG_STREAM_START_STREAM_GRP_PACKET) */
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/* though why not here */
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request.message_id = MSG_SYSTEM_SEND_SYNCHRO_CMD;
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request.uid = (struct mixart_uid){0,0};
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request.data = NULL;
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request.size = 0;
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/* this command has no data. response is a 32 bit status */
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err = snd_mixart_send_msg(mgr, &request, sizeof(k), &k);
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if( (err < 0) || (k != 0) ) {
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dev_err(&mgr->pci->dev, "error MSG_SYSTEM_SEND_SYNCHRO_CMD\n");
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return err == 0 ? -EINVAL : err;
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}
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return 0;
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}
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/* firmware base addresses (when hard coded) */
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#define MIXART_MOTHERBOARD_XLX_BASE_ADDRESS 0x00600000
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static int mixart_dsp_load(struct mixart_mgr* mgr, int index, const struct firmware *dsp)
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{
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int err, card_index;
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u32 status_xilinx, status_elf, status_daught;
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u32 val;
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/* read motherboard xilinx status */
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status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
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/* read elf status */
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status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
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/* read daughterboard xilinx status */
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status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
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/* motherboard xilinx status 5 will say that the board is performing a reset */
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if (status_xilinx == 5) {
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dev_err(&mgr->pci->dev, "miXart is resetting !\n");
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return -EAGAIN; /* try again later */
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}
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switch (index) {
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case MIXART_MOTHERBOARD_XLX_INDEX:
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/* xilinx already loaded ? */
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if (status_xilinx == 4) {
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dev_dbg(&mgr->pci->dev, "xilinx is already loaded !\n");
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return 0;
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}
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/* the status should be 0 == "idle" */
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if (status_xilinx != 0) {
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dev_err(&mgr->pci->dev,
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"xilinx load error ! status = %d\n",
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status_xilinx);
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return -EIO; /* modprob -r may help ? */
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}
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/* check xilinx validity */
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if (((u32*)(dsp->data))[0] == 0xffffffff)
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return -EINVAL;
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if (dsp->size % 4)
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return -EINVAL;
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/* set xilinx status to copying */
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writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
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/* setup xilinx base address */
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writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET ));
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/* setup code size for xilinx file */
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writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET ));
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/* copy xilinx code */
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memcpy_toio( MIXART_MEM( mgr, MIXART_MOTHERBOARD_XLX_BASE_ADDRESS), dsp->data, dsp->size);
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/* set xilinx status to copy finished */
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writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET ));
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/* return, because no further processing needed */
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return 0;
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case MIXART_MOTHERBOARD_ELF_INDEX:
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if (status_elf == 4) {
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dev_dbg(&mgr->pci->dev, "elf file already loaded !\n");
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return 0;
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}
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/* the status should be 0 == "idle" */
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if (status_elf != 0) {
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dev_err(&mgr->pci->dev,
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"elf load error ! status = %d\n",
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status_elf);
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return -EIO; /* modprob -r may help ? */
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}
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|
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/* wait for xilinx status == 4 */
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err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET, 1, 4, 500); /* 5sec */
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if (err < 0) {
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dev_err(&mgr->pci->dev, "xilinx was not loaded or "
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"could not be started\n");
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return err;
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}
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|
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/* init some data on the card */
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writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */
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writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */
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/* set elf status to copying */
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writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
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/* process the copying of the elf packets */
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err = mixart_load_elf( mgr, dsp );
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if (err < 0) return err;
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/* set elf status to copy finished */
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writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET ));
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/* wait for elf status == 4 */
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err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET, 1, 4, 300); /* 3sec */
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if (err < 0) {
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dev_err(&mgr->pci->dev, "elf could not be started\n");
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return err;
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}
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|
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/* miXart waits at this point on the pointer to the flow table */
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writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */
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|
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return 0; /* return, another xilinx file has to be loaded before */
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|
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case MIXART_AESEBUBOARD_XLX_INDEX:
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default:
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|
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/* elf and xilinx should be loaded */
|
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if (status_elf != 4 || status_xilinx != 4) {
|
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dev_err(&mgr->pci->dev, "xilinx or elf not "
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"successfully loaded\n");
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return -EIO; /* modprob -r may help ? */
|
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}
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|
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/* wait for daughter detection != 0 */
|
|
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET, 0, 0, 30); /* 300msec */
|
|
if (err < 0) {
|
|
dev_err(&mgr->pci->dev, "error starting elf file\n");
|
|
return err;
|
|
}
|
|
|
|
/* the board type can now be retrieved */
|
|
mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET)));
|
|
|
|
if (mgr->board_type == MIXART_DAUGHTER_TYPE_NONE)
|
|
break; /* no daughter board; the file does not have to be loaded, continue after the switch */
|
|
|
|
/* only if aesebu daughter board presence (elf code must run) */
|
|
if (mgr->board_type != MIXART_DAUGHTER_TYPE_AES )
|
|
return -EINVAL;
|
|
|
|
/* daughter should be idle */
|
|
if (status_daught != 0) {
|
|
dev_err(&mgr->pci->dev,
|
|
"daughter load error ! status = %d\n",
|
|
status_daught);
|
|
return -EIO; /* modprob -r may help ? */
|
|
}
|
|
|
|
/* check daughterboard xilinx validity */
|
|
if (((u32*)(dsp->data))[0] == 0xffffffff)
|
|
return -EINVAL;
|
|
if (dsp->size % 4)
|
|
return -EINVAL;
|
|
|
|
/* inform mixart about the size of the file */
|
|
writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET ));
|
|
|
|
/* set daughterboard status to 1 */
|
|
writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
|
|
|
|
/* wait for status == 2 */
|
|
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 2, 30); /* 300msec */
|
|
if (err < 0) {
|
|
dev_err(&mgr->pci->dev, "daughter board load error\n");
|
|
return err;
|
|
}
|
|
|
|
/* get the address where to write the file */
|
|
val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET ));
|
|
if (!val)
|
|
return -EINVAL;
|
|
|
|
/* copy daughterboard xilinx code */
|
|
memcpy_toio( MIXART_MEM( mgr, val), dsp->data, dsp->size);
|
|
|
|
/* set daughterboard status to 4 */
|
|
writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
|
|
|
|
/* continue with init */
|
|
break;
|
|
} /* end of switch file index*/
|
|
|
|
/* wait for daughter status == 3 */
|
|
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 3, 300); /* 3sec */
|
|
if (err < 0) {
|
|
dev_err(&mgr->pci->dev,
|
|
"daughter board could not be initialised\n");
|
|
return err;
|
|
}
|
|
|
|
/* init mailbox (communication with embedded) */
|
|
snd_mixart_init_mailbox(mgr);
|
|
|
|
/* first communication with embedded */
|
|
err = mixart_first_init(mgr);
|
|
if (err < 0) {
|
|
dev_err(&mgr->pci->dev, "miXart could not be set up\n");
|
|
return err;
|
|
}
|
|
|
|
/* create devices and mixer in accordance with HW options*/
|
|
for (card_index = 0; card_index < mgr->num_cards; card_index++) {
|
|
struct snd_mixart *chip = mgr->chip[card_index];
|
|
|
|
if ((err = snd_mixart_create_pcm(chip)) < 0)
|
|
return err;
|
|
|
|
if (card_index == 0) {
|
|
if ((err = snd_mixart_create_mixer(chip->mgr)) < 0)
|
|
return err;
|
|
}
|
|
|
|
if ((err = snd_card_register(chip->card)) < 0)
|
|
return err;
|
|
}
|
|
|
|
dev_dbg(&mgr->pci->dev,
|
|
"miXart firmware downloaded and successfully set up\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int snd_mixart_setup_firmware(struct mixart_mgr *mgr)
|
|
{
|
|
static const char * const fw_files[3] = {
|
|
"miXart8.xlx", "miXart8.elf", "miXart8AES.xlx"
|
|
};
|
|
char path[32];
|
|
|
|
const struct firmware *fw_entry;
|
|
int i, err;
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
sprintf(path, "mixart/%s", fw_files[i]);
|
|
if (request_firmware(&fw_entry, path, &mgr->pci->dev)) {
|
|
dev_err(&mgr->pci->dev,
|
|
"miXart: can't load firmware %s\n", path);
|
|
return -ENOENT;
|
|
}
|
|
/* fake hwdep dsp record */
|
|
err = mixart_dsp_load(mgr, i, fw_entry);
|
|
release_firmware(fw_entry);
|
|
if (err < 0)
|
|
return err;
|
|
mgr->dsp_loaded |= 1 << i;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
MODULE_FIRMWARE("mixart/miXart8.xlx");
|
|
MODULE_FIRMWARE("mixart/miXart8.elf");
|
|
MODULE_FIRMWARE("mixart/miXart8AES.xlx");
|