e0477b34d9
The code in setup_dma_device has become rather convoluted, move all of this to the drivers. Drives now pass in a DMA capable struct device which will be used to setup DMA, or drivers must fully configure the ibdev for DMA and pass in NULL. Other than setting the masks in rvt all drivers were doing this already anyhow. mthca, mlx4 and mlx5 were already setting up maximum DMA segment size for DMA based on their hardweare limits in: __mthca_init_one() dma_set_max_seg_size (1G) __mlx4_init_one() dma_set_max_seg_size (1G) mlx5_pci_init() set_dma_caps() dma_set_max_seg_size (2G) Other non software drivers (except usnic) were extended to UINT_MAX [1, 2] instead of 2G as was before. [1] https://lore.kernel.org/linux-rdma/20200924114940.GE9475@nvidia.com/ [2] https://lore.kernel.org/linux-rdma/20200924114940.GE9475@nvidia.com/ Link: https://lore.kernel.org/r/20201008082752.275846-1-leon@kernel.org Link: https://lore.kernel.org/r/6b2ed339933d066622d5715903870676d8cc523a.1602590106.git.mchehab+huawei@kernel.org Suggested-by: Christoph Hellwig <hch@infradead.org> Signed-off-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> |
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.. | ||
ib_addr.h | ||
ib_cache.h | ||
ib_cm.h | ||
ib_hdrs.h | ||
ib_mad.h | ||
ib_marshall.h | ||
ib_pack.h | ||
ib_pma.h | ||
ib_sa.h | ||
ib_smi.h | ||
ib_umem_odp.h | ||
ib_umem.h | ||
ib_verbs.h | ||
ib.h | ||
iba.h | ||
ibta_vol1_c12.h | ||
iw_cm.h | ||
iw_portmap.h | ||
lag.h | ||
mr_pool.h | ||
opa_addr.h | ||
opa_port_info.h | ||
opa_smi.h | ||
opa_vnic.h | ||
rdma_cm_ib.h | ||
rdma_cm.h | ||
rdma_counter.h | ||
rdma_netlink.h | ||
rdma_vt.h | ||
rdmavt_cq.h | ||
rdmavt_mr.h | ||
rdmavt_qp.h | ||
restrack.h | ||
rw.h | ||
signature.h | ||
tid_rdma_defs.h | ||
uverbs_ioctl.h | ||
uverbs_named_ioctl.h | ||
uverbs_std_types.h | ||
uverbs_types.h |