Paul Walmsley 6a527b6785 riscv: init: merge split string literals in preprocessor directive ... sparse complains loudly when string literals associated with preprocessor directives are split into multiple, separately quoted strings across different lines: arch/riscv/mm/init.c:341:9: error: Expected ; at the end of type declaration arch/riscv/mm/init.c:341:9: error: got "not use absolute addressing." arch/riscv/mm/init.c:358:9: error: Trying to use reserved word 'do' as identifier arch/riscv/mm/init.c:358:9: error: Expected ; at end of declaration [ ... ] It turns out this doesn't compile. The existing Linux practice for this situation is simply to use a single long line. So, fix by concatenating the strings. This patch should have no functional impact. This version incorporates changes based on feedback from Luc Van Oostenryck <luc.vanoostenryck@gmail.com>. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Link: https://lore.kernel.org/linux-riscv/CAAhSdy2nX2LwEEAZuMtW_ByGTkHO6KaUEvVxRnba_ENEjmFayQ@mail.gmail.com/T/#mc1a58bc864f71278123d19a7abc083a9c8e37033 Fixes: 387181dcdb ("RISC-V: Always compile mm/init.c with cmodel=medany and notrace") Cc: Anup Patel <anup.patel@wdc.com>		2019-10-28 00:46:01 -07:00
..
cacheflush.c	riscv: cleanup riscv_cpuid_to_hartid_mask	2019-09-05 01:51:57 -07:00
context.c	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
extable.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120	2019-05-24 17:39:02 +02:00
fault.c	riscv: add prototypes for assembly language functions from head.S	2019-10-28 00:46:00 -07:00
hugetlbpage.c	riscv: Introduce huge page support for 32/64bit kernel	2019-07-03 15:23:38 -07:00
init.c	riscv: init: merge split string literals in preprocessor directive	2019-10-28 00:46:01 -07:00
ioremap.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
Makefile	riscv: move the TLB flush logic out of line	2019-09-05 01:54:51 -07:00
sifive_l2_cache.c	riscv: ccache: Remove unused variable	2019-07-04 03:12:24 -07:00
tlbflush.c	riscv: move the TLB flush logic out of line	2019-09-05 01:54:51 -07:00