93dae5b70e
When a cpu really is stuck in the kernel, it can be often impossible to figure out which cpu is stuck where. The worst case is when the stuck cpu has interrupts disabled. Therefore, implement a global cpu state capture that uses SMP message interrupts which are not disabled by the normal IRQ enable/disable APIs of the kernel. As long as we can get a sysrq 'y' to the kernel, we can get a dump. Even if the console interrupt cpu is wedged, we can trigger it from userspace using /proc/sysrq-trigger The output is made compact so that this facility is more useful on high cpu count systems, which is where this facility will likely find itself the most useful :) Signed-off-by: David S. Miller <davem@davemloft.net>
343 lines
8.0 KiB
C
343 lines
8.0 KiB
C
#ifndef _SPARC64_PTRACE_H
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#define _SPARC64_PTRACE_H
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#include <asm/pstate.h>
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/* This struct defines the way the registers are stored on the
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* stack during a system call and basically all traps.
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*/
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/* This magic value must have the low 9 bits clear,
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* as that is where we encode the %tt value, see below.
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*/
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#define PT_REGS_MAGIC 0x57ac6c00
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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struct pt_regs {
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unsigned long u_regs[16]; /* globals and ins */
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unsigned long tstate;
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unsigned long tpc;
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unsigned long tnpc;
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unsigned int y;
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/* We encode a magic number, PT_REGS_MAGIC, along
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* with the %tt (trap type) register value at trap
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* entry time. The magic number allows us to identify
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* accurately a trap stack frame in the stack
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* unwinder, and the %tt value allows us to test
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* things like "in a system call" etc. for an arbitray
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* process.
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*
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* The PT_REGS_MAGIC is choosen such that it can be
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* loaded completely using just a sethi instruction.
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*/
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unsigned int magic;
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};
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static inline int pt_regs_trap_type(struct pt_regs *regs)
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{
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return regs->magic & 0x1ff;
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}
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static inline bool pt_regs_is_syscall(struct pt_regs *regs)
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{
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return (regs->tstate & TSTATE_SYSCALL);
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}
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static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
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{
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return (regs->tstate &= ~TSTATE_SYSCALL);
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}
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struct pt_regs32 {
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unsigned int psr;
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unsigned int pc;
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unsigned int npc;
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unsigned int y;
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unsigned int u_regs[16]; /* globals and ins */
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};
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#define UREG_G0 0
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#define UREG_G1 1
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#define UREG_G2 2
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#define UREG_G3 3
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#define UREG_G4 4
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#define UREG_G5 5
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#define UREG_G6 6
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#define UREG_G7 7
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#define UREG_I0 8
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#define UREG_I1 9
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#define UREG_I2 10
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#define UREG_I3 11
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#define UREG_I4 12
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#define UREG_I5 13
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#define UREG_I6 14
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#define UREG_I7 15
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#define UREG_FP UREG_I6
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#define UREG_RETPC UREG_I7
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/* A V9 register window */
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struct reg_window {
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unsigned long locals[8];
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unsigned long ins[8];
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};
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/* A 32-bit register window. */
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struct reg_window32 {
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unsigned int locals[8];
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unsigned int ins[8];
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};
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/* A V9 Sparc stack frame */
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struct sparc_stackf {
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unsigned long locals[8];
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unsigned long ins[6];
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struct sparc_stackf *fp;
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unsigned long callers_pc;
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char *structptr;
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unsigned long xargs[6];
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unsigned long xxargs[1];
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};
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/* A 32-bit Sparc stack frame */
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struct sparc_stackf32 {
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unsigned int locals[8];
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unsigned int ins[6];
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unsigned int fp;
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unsigned int callers_pc;
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unsigned int structptr;
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unsigned int xargs[6];
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unsigned int xxargs[1];
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};
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struct sparc_trapf {
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unsigned long locals[8];
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unsigned long ins[8];
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unsigned long _unused;
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struct pt_regs *regs;
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};
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#define TRACEREG_SZ sizeof(struct pt_regs)
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#define STACKFRAME_SZ sizeof(struct sparc_stackf)
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#define TRACEREG32_SZ sizeof(struct pt_regs32)
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#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
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struct global_reg_snapshot {
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unsigned long tstate;
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unsigned long tpc;
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unsigned long tnpc;
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unsigned long o7;
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unsigned long i7;
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struct thread_info *thread;
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unsigned long pad1;
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unsigned long pad2;
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};
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#ifdef __KERNEL__
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#define __ARCH_WANT_COMPAT_SYS_PTRACE
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#define force_successful_syscall_return() \
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do { current_thread_info()->syscall_noerror = 1; \
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} while (0)
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#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
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#define instruction_pointer(regs) ((regs)->tpc)
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#define regs_return_value(regs) ((regs)->u_regs[UREG_I0])
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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extern void show_regs(struct pt_regs *);
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extern void __show_regs(struct pt_regs *);
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#endif
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#else /* __ASSEMBLY__ */
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/* For assembly code. */
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#define TRACEREG_SZ 0xa0
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#define STACKFRAME_SZ 0xc0
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#define TRACEREG32_SZ 0x50
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#define STACKFRAME32_SZ 0x60
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#endif
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#ifdef __KERNEL__
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#define STACK_BIAS 2047
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#endif
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/* These are for pt_regs. */
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#define PT_V9_G0 0x00
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#define PT_V9_G1 0x08
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#define PT_V9_G2 0x10
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#define PT_V9_G3 0x18
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#define PT_V9_G4 0x20
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#define PT_V9_G5 0x28
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#define PT_V9_G6 0x30
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#define PT_V9_G7 0x38
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#define PT_V9_I0 0x40
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#define PT_V9_I1 0x48
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#define PT_V9_I2 0x50
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#define PT_V9_I3 0x58
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#define PT_V9_I4 0x60
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#define PT_V9_I5 0x68
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#define PT_V9_I6 0x70
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#define PT_V9_FP PT_V9_I6
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#define PT_V9_I7 0x78
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#define PT_V9_TSTATE 0x80
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#define PT_V9_TPC 0x88
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#define PT_V9_TNPC 0x90
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#define PT_V9_Y 0x98
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#define PT_V9_MAGIC 0x9c
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#define PT_TSTATE PT_V9_TSTATE
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#define PT_TPC PT_V9_TPC
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#define PT_TNPC PT_V9_TNPC
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/* These for pt_regs32. */
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#define PT_PSR 0x0
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#define PT_PC 0x4
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#define PT_NPC 0x8
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#define PT_Y 0xc
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#define PT_G0 0x10
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#define PT_WIM PT_G0
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#define PT_G1 0x14
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#define PT_G2 0x18
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#define PT_G3 0x1c
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#define PT_G4 0x20
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#define PT_G5 0x24
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#define PT_G6 0x28
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#define PT_G7 0x2c
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#define PT_I0 0x30
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#define PT_I1 0x34
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#define PT_I2 0x38
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#define PT_I3 0x3c
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#define PT_I4 0x40
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#define PT_I5 0x44
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#define PT_I6 0x48
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#define PT_FP PT_I6
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#define PT_I7 0x4c
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/* Reg_window offsets */
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#define RW_V9_L0 0x00
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#define RW_V9_L1 0x08
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#define RW_V9_L2 0x10
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#define RW_V9_L3 0x18
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#define RW_V9_L4 0x20
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#define RW_V9_L5 0x28
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#define RW_V9_L6 0x30
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#define RW_V9_L7 0x38
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#define RW_V9_I0 0x40
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#define RW_V9_I1 0x48
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#define RW_V9_I2 0x50
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#define RW_V9_I3 0x58
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#define RW_V9_I4 0x60
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#define RW_V9_I5 0x68
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#define RW_V9_I6 0x70
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#define RW_V9_I7 0x78
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#define RW_L0 0x00
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#define RW_L1 0x04
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#define RW_L2 0x08
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#define RW_L3 0x0c
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#define RW_L4 0x10
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#define RW_L5 0x14
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#define RW_L6 0x18
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#define RW_L7 0x1c
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#define RW_I0 0x20
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#define RW_I1 0x24
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#define RW_I2 0x28
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#define RW_I3 0x2c
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#define RW_I4 0x30
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#define RW_I5 0x34
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#define RW_I6 0x38
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#define RW_I7 0x3c
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/* Stack_frame offsets */
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#define SF_V9_L0 0x00
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#define SF_V9_L1 0x08
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#define SF_V9_L2 0x10
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#define SF_V9_L3 0x18
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#define SF_V9_L4 0x20
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#define SF_V9_L5 0x28
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#define SF_V9_L6 0x30
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#define SF_V9_L7 0x38
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#define SF_V9_I0 0x40
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#define SF_V9_I1 0x48
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#define SF_V9_I2 0x50
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#define SF_V9_I3 0x58
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#define SF_V9_I4 0x60
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#define SF_V9_I5 0x68
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#define SF_V9_FP 0x70
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#define SF_V9_PC 0x78
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#define SF_V9_RETP 0x80
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#define SF_V9_XARG0 0x88
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#define SF_V9_XARG1 0x90
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#define SF_V9_XARG2 0x98
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#define SF_V9_XARG3 0xa0
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#define SF_V9_XARG4 0xa8
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#define SF_V9_XARG5 0xb0
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#define SF_V9_XXARG 0xb8
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#define SF_L0 0x00
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#define SF_L1 0x04
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#define SF_L2 0x08
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#define SF_L3 0x0c
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#define SF_L4 0x10
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#define SF_L5 0x14
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#define SF_L6 0x18
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#define SF_L7 0x1c
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#define SF_I0 0x20
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#define SF_I1 0x24
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#define SF_I2 0x28
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#define SF_I3 0x2c
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#define SF_I4 0x30
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#define SF_I5 0x34
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#define SF_FP 0x38
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#define SF_PC 0x3c
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#define SF_RETP 0x40
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#define SF_XARG0 0x44
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#define SF_XARG1 0x48
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#define SF_XARG2 0x4c
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#define SF_XARG3 0x50
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#define SF_XARG4 0x54
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#define SF_XARG5 0x58
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#define SF_XXARG 0x5c
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/* global_reg_snapshot offsets */
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#define GR_SNAP_TSTATE 0x00
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#define GR_SNAP_TPC 0x08
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#define GR_SNAP_TNPC 0x10
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#define GR_SNAP_O7 0x18
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#define GR_SNAP_I7 0x20
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#define GR_SNAP_THREAD 0x28
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#define GR_SNAP_PAD1 0x30
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#define GR_SNAP_PAD2 0x38
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/* Stuff for the ptrace system call */
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#define PTRACE_SPARC_DETACH 11
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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#define PTRACE_READDATA 16
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#define PTRACE_WRITEDATA 17
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#define PTRACE_READTEXT 18
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#define PTRACE_WRITETEXT 19
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#define PTRACE_GETFPAREGS 20
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#define PTRACE_SETFPAREGS 21
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/* There are for debugging 64-bit processes, either from a 32 or 64 bit
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* parent. Thus their complements are for debugging 32-bit processes only.
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*/
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#define PTRACE_GETREGS64 22
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#define PTRACE_SETREGS64 23
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/* PTRACE_SYSCALL is 24 */
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#define PTRACE_GETFPREGS64 25
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#define PTRACE_SETFPREGS64 26
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#endif /* !(_SPARC64_PTRACE_H) */
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