7cbb39d4d4
Pull kvm updates from Paolo Bonzini: "PPC and ARM do not have much going on this time. Most of the cool stuff, instead, is in s390 and (after a few releases) x86. ARM has some caching fixes and PPC has transactional memory support in guests. MIPS has some fixes, with more probably coming in 3.16 as QEMU will soon get support for MIPS KVM. For x86 there are optimizations for debug registers, which trigger on some Windows games, and other important fixes for Windows guests. We now expose to the guest Broadwell instruction set extensions and also Intel MPX. There's also a fix/workaround for OS X guests, nested virtualization features (preemption timer), and a couple kvmclock refinements. For s390, the main news is asynchronous page faults, together with improvements to IRQs (floating irqs and adapter irqs) that speed up virtio devices" * tag 'kvm-3.15-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (96 commits) KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8 KVM: PPC: Book3S HV: Fix decrementer timeouts with non-zero TB offset KVM: PPC: Book3S HV: Don't use kvm_memslots() in real mode KVM: PPC: Book3S HV: Return ENODEV error rather than EIO KVM: PPC: Book3S: Trim top 4 bits of physical address in RTAS code KVM: PPC: Book3S HV: Add get/set_one_reg for new TM state KVM: PPC: Book3S HV: Add transactional memory support KVM: Specify byte order for KVM_EXIT_MMIO KVM: vmx: fix MPX detection KVM: PPC: Book3S HV: Fix KVM hang with CONFIG_KVM_XICS=n KVM: PPC: Book3S: Introduce hypervisor call H_GET_TCE KVM: PPC: Book3S HV: Fix incorrect userspace exit on ioeventfd write KVM: s390: clear local interrupts at cpu initial reset KVM: s390: Fix possible memory leak in SIGP functions KVM: s390: fix calculation of idle_mask array size KVM: s390: randomize sca address KVM: ioapic: reinject pending interrupts on KVM_SET_IRQCHIP KVM: Bump KVM_MAX_IRQ_ROUTES for s390 KVM: s390: irq routing for adapter interrupts. KVM: s390: adapter interrupt sources ...
309 lines
8.9 KiB
C
309 lines
8.9 KiB
C
/*
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* Copyright IBM Corp. 2004, 2011
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Holger Smolinski <Holger.Smolinski@de.ibm.com>,
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* Thomas Spatzier <tspat@de.ibm.com>,
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*
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* This file contains interrupt related functions.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/proc_fs.h>
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#include <linux/profile.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/ftrace.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/cpu.h>
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#include <linux/irq.h>
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#include <asm/irq_regs.h>
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#include <asm/cputime.h>
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#include <asm/lowcore.h>
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#include <asm/irq.h>
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#include <asm/hw_irq.h>
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#include "entry.h"
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DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
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EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
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struct irq_class {
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char *name;
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char *desc;
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};
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/*
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* The list of "main" irq classes on s390. This is the list of interrupts
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* that appear both in /proc/stat ("intr" line) and /proc/interrupts.
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* Historically only external and I/O interrupts have been part of /proc/stat.
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* We can't add the split external and I/O sub classes since the first field
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* in the "intr" line in /proc/stat is supposed to be the sum of all other
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* fields.
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* Since the external and I/O interrupt fields are already sums we would end
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* up with having a sum which accounts each interrupt twice.
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*/
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static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
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[EXT_INTERRUPT] = {.name = "EXT"},
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[IO_INTERRUPT] = {.name = "I/O"},
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[THIN_INTERRUPT] = {.name = "AIO"},
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};
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/*
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* The list of split external and I/O interrupts that appear only in
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* /proc/interrupts.
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* In addition this list contains non external / I/O events like NMIs.
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*/
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static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
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[IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
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[IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
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[IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
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[IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
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[IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
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[IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
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[IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
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[IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
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[IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
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[IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
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[IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
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[IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
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[IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
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[IRQIO_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
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[IRQIO_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
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[IRQIO_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
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[IRQIO_C15] = {.name = "C15", .desc = "[I/O] 3215"},
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[IRQIO_C70] = {.name = "C70", .desc = "[I/O] 3270"},
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[IRQIO_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
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[IRQIO_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
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[IRQIO_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
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[IRQIO_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
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[IRQIO_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
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[IRQIO_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
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[IRQIO_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
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[IRQIO_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
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[IRQIO_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
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[IRQIO_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
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[IRQIO_VIR] = {.name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
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[IRQIO_VAI] = {.name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
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[NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
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[CPU_RST] = {.name = "RST", .desc = "[CPU] CPU Restart"},
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};
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void __init init_IRQ(void)
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{
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irq_reserve_irqs(0, THIN_INTERRUPT);
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init_cio_interrupts();
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init_airq_interrupts();
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init_ext_interrupts();
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}
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void do_IRQ(struct pt_regs *regs, int irq)
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{
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struct pt_regs *old_regs;
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old_regs = set_irq_regs(regs);
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irq_enter();
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if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
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/* Serve timer interrupts first. */
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clock_comparator_work();
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generic_handle_irq(irq);
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irq_exit();
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set_irq_regs(old_regs);
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}
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/*
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* show_interrupts is needed by /proc/interrupts.
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int irq = *(loff_t *) v;
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int cpu;
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get_online_cpus();
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if (irq == 0) {
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seq_puts(p, " ");
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for_each_online_cpu(cpu)
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seq_printf(p, "CPU%d ", cpu);
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seq_putc(p, '\n');
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goto out;
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}
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if (irq < NR_IRQS) {
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if (irq >= NR_IRQS_BASE)
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goto out;
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seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
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for_each_online_cpu(cpu)
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seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
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seq_putc(p, '\n');
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goto out;
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}
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for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
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seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
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for_each_online_cpu(cpu)
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seq_printf(p, "%10u ",
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per_cpu(irq_stat, cpu).irqs[irq]);
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if (irqclass_sub_desc[irq].desc)
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seq_printf(p, " %s", irqclass_sub_desc[irq].desc);
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seq_putc(p, '\n');
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}
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out:
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put_online_cpus();
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return 0;
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}
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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return 0;
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}
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/*
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* Switch to the asynchronous interrupt stack for softirq execution.
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*/
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void do_softirq_own_stack(void)
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{
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unsigned long old, new;
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/* Get current stack pointer. */
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asm volatile("la %0,0(15)" : "=a" (old));
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/* Check against async. stack address range. */
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new = S390_lowcore.async_stack;
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if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
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/* Need to switch to the async. stack. */
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new -= STACK_FRAME_OVERHEAD;
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((struct stack_frame *) new)->back_chain = old;
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asm volatile(" la 15,0(%0)\n"
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" basr 14,%2\n"
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" la 15,0(%1)\n"
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: : "a" (new), "a" (old),
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"a" (__do_softirq)
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: "0", "1", "2", "3", "4", "5", "14",
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"cc", "memory" );
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} else {
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/* We are already on the async stack. */
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__do_softirq();
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}
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}
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/*
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* ext_int_hash[index] is the list head for all external interrupts that hash
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* to this index.
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*/
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static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
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struct ext_int_info {
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ext_int_handler_t handler;
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struct hlist_node entry;
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struct rcu_head rcu;
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u16 code;
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};
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/* ext_int_hash_lock protects the handler lists for external interrupts */
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static DEFINE_SPINLOCK(ext_int_hash_lock);
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static inline int ext_hash(u16 code)
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{
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BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
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return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
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}
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int register_external_interrupt(u16 code, ext_int_handler_t handler)
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{
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struct ext_int_info *p;
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unsigned long flags;
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int index;
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p = kmalloc(sizeof(*p), GFP_ATOMIC);
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if (!p)
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return -ENOMEM;
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p->code = code;
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p->handler = handler;
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index = ext_hash(code);
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spin_lock_irqsave(&ext_int_hash_lock, flags);
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hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
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spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(register_external_interrupt);
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int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
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{
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struct ext_int_info *p;
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unsigned long flags;
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int index = ext_hash(code);
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spin_lock_irqsave(&ext_int_hash_lock, flags);
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hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
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if (p->code == code && p->handler == handler) {
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hlist_del_rcu(&p->entry);
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kfree_rcu(p, rcu);
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}
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}
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spin_unlock_irqrestore(&ext_int_hash_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(unregister_external_interrupt);
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static irqreturn_t do_ext_interrupt(int irq, void *dummy)
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{
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struct pt_regs *regs = get_irq_regs();
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struct ext_code ext_code;
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struct ext_int_info *p;
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int index;
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ext_code = *(struct ext_code *) ®s->int_code;
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if (ext_code.code != 0x1004)
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__get_cpu_var(s390_idle).nohz_delay = 1;
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index = ext_hash(ext_code.code);
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rcu_read_lock();
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hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
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if (unlikely(p->code != ext_code.code))
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continue;
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p->handler(ext_code, regs->int_parm, regs->int_parm_long);
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}
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rcu_read_unlock();
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return IRQ_HANDLED;
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}
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static struct irqaction external_interrupt = {
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.name = "EXT",
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.handler = do_ext_interrupt,
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};
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void __init init_ext_interrupts(void)
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{
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int idx;
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for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
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INIT_HLIST_HEAD(&ext_int_hash[idx]);
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irq_set_chip_and_handler(EXT_INTERRUPT,
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&dummy_irq_chip, handle_percpu_irq);
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setup_irq(EXT_INTERRUPT, &external_interrupt);
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}
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static DEFINE_SPINLOCK(irq_subclass_lock);
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static unsigned char irq_subclass_refcount[64];
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void irq_subclass_register(enum irq_subclass subclass)
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{
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spin_lock(&irq_subclass_lock);
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if (!irq_subclass_refcount[subclass])
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ctl_set_bit(0, subclass);
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irq_subclass_refcount[subclass]++;
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spin_unlock(&irq_subclass_lock);
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}
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EXPORT_SYMBOL(irq_subclass_register);
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void irq_subclass_unregister(enum irq_subclass subclass)
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{
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spin_lock(&irq_subclass_lock);
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irq_subclass_refcount[subclass]--;
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if (!irq_subclass_refcount[subclass])
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ctl_clear_bit(0, subclass);
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spin_unlock(&irq_subclass_lock);
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}
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EXPORT_SYMBOL(irq_subclass_unregister);
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