Codrin Ciubotariu d35bf8d766 clk: at91: generated: consider range when calculating best rate ... [ Upstream commit d0031e6fbed955ff8d5f5bbc8fe7382482559cec ] clk_generated_best_diff() helps in finding the parent and the divisor to compute a rate closest to the required one. However, it doesn't take into account the request's range for the new rate. Make sure the new rate is within the required range. Fixes: 8a8f4bf0c4 ("clk: at91: clk-generated: create function to find best_diff") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20220413071318.244912-1-codrin.ciubotariu@microchip.com Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-05-25 09:17:58 +02:00
..
at91rm9200.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9g45.c	clk: at91: drop unused at91sam9g45_pcr_layout	2020-09-22 12:44:35 -07:00
at91sam9n12.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9rl.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9x5.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9260.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
clk-audio-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-generated.c	clk: at91: generated: consider range when calculating best rate	2022-05-25 09:17:58 +02:00
clk-h32mx.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-i2s-mux.c
clk-main.c	clk: at91: clk-main: update key before writing AT91_CKGR_MOR	2020-10-13 19:59:01 -07:00
clk-master.c	clk: at91: clk-master: add master clock support for SAMA7G5	2020-07-24 02:19:08 -07:00
clk-peripheral.c	clk: at91: remove the checking of parent_name	2020-10-13 19:59:01 -07:00
clk-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-plldiv.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-programmable.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
clk-sam9x60-pll.c	clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL	2021-11-18 14:04:21 +01:00
clk-slow.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-smd.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-system.c	clk: at91: replace conditional operator with double logical not	2020-07-24 02:19:08 -07:00
clk-usb.c	clk: at91: usb: introduce num_parents in driver's structure	2020-02-12 15:31:47 -08:00
clk-utmi.c	clk: at91: clk-utmi: add utmi support for sama7g5	2020-07-24 02:19:08 -07:00
dt-compat.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
Makefile	clk: at91: sama7g5: add clock support for sama7g5	2020-07-24 02:19:09 -07:00
pmc.c	clk: at91: check pmc node status before registering syscore ops	2021-11-18 14:04:17 +01:00
pmc.h	clk: at91: clk-utmi: add utmi support for sama7g5	2020-07-24 02:19:08 -07:00
sam9x60.c	clk: at91: sam9x60: remove atmel,osc-bypass support	2020-12-30 11:54:01 +01:00
sama5d2.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama5d3.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama5d4.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama7g5.c	clk: at91: sama7g5: fix parents of PDMCs' GCLK	2022-04-08 14:40:25 +02:00
sckc.c	clk: at91: sckc: register slow_rc with accuracy option	2020-07-24 02:19:08 -07:00