4e73238d16
The interrupt enable bit for the performance counters is in the Control Register $24, not in the counter register. loongson2_perfcount_handler(), we need to use Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1198/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> --- |
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.. | ||
alchemy | ||
ar7 | ||
bcm47xx | ||
bcm63xx | ||
boot | ||
cavium-octeon | ||
cobalt | ||
configs | ||
dec | ||
emma | ||
fw | ||
gt64120/wrppmc | ||
include/asm | ||
jazz | ||
kernel | ||
lasat | ||
lib | ||
loongson | ||
math-emu | ||
mipssim | ||
mm | ||
mti-malta | ||
nxp | ||
oprofile | ||
pci | ||
pmc-sierra | ||
power | ||
powertv | ||
rb532 | ||
sgi-ip22 | ||
sgi-ip27 | ||
sgi-ip32 | ||
sibyte | ||
sni | ||
txx9 | ||
vr41xx | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |