1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
219 lines
5.7 KiB
C
219 lines
5.7 KiB
C
/* unaligned.c: unalignment fixup handler for CPUs on which it is supported (FR451 only)
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*
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* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/types.h>
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#include <linux/user.h>
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#include <linux/string.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/setup.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#if 0
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#define kdebug(fmt, ...) printk("FDPIC "fmt"\n" ,##__VA_ARGS__ )
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#else
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#define kdebug(fmt, ...) do {} while(0)
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#endif
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#define _MA_SIGNED 0x01
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#define _MA_HALF 0x02
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#define _MA_WORD 0x04
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#define _MA_DWORD 0x08
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#define _MA_SZ_MASK 0x0e
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#define _MA_LOAD 0x10
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#define _MA_STORE 0x20
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#define _MA_UPDATE 0x40
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#define _MA_IMM 0x80
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#define _MA_LDxU _MA_LOAD | _MA_UPDATE
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#define _MA_LDxI _MA_LOAD | _MA_IMM
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#define _MA_STxU _MA_STORE | _MA_UPDATE
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#define _MA_STxI _MA_STORE | _MA_IMM
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static const uint8_t tbl_LDGRk_reg[0x40] = {
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[0x02] = _MA_LOAD | _MA_HALF | _MA_SIGNED, /* LDSH @(GRi,GRj),GRk */
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[0x03] = _MA_LOAD | _MA_HALF, /* LDUH @(GRi,GRj),GRk */
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[0x04] = _MA_LOAD | _MA_WORD, /* LD @(GRi,GRj),GRk */
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[0x05] = _MA_LOAD | _MA_DWORD, /* LDD @(GRi,GRj),GRk */
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[0x12] = _MA_LDxU | _MA_HALF | _MA_SIGNED, /* LDSHU @(GRi,GRj),GRk */
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[0x13] = _MA_LDxU | _MA_HALF, /* LDUHU @(GRi,GRj),GRk */
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[0x14] = _MA_LDxU | _MA_WORD, /* LDU @(GRi,GRj),GRk */
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[0x15] = _MA_LDxU | _MA_DWORD, /* LDDU @(GRi,GRj),GRk */
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};
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static const uint8_t tbl_STGRk_reg[0x40] = {
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[0x01] = _MA_STORE | _MA_HALF, /* STH @(GRi,GRj),GRk */
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[0x02] = _MA_STORE | _MA_WORD, /* ST @(GRi,GRj),GRk */
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[0x03] = _MA_STORE | _MA_DWORD, /* STD @(GRi,GRj),GRk */
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[0x11] = _MA_STxU | _MA_HALF, /* STHU @(GRi,GRj),GRk */
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[0x12] = _MA_STxU | _MA_WORD, /* STU @(GRi,GRj),GRk */
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[0x13] = _MA_STxU | _MA_DWORD, /* STDU @(GRi,GRj),GRk */
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};
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static const uint8_t tbl_LDSTGRk_imm[0x80] = {
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[0x31] = _MA_LDxI | _MA_HALF | _MA_SIGNED, /* LDSHI @(GRi,d12),GRk */
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[0x32] = _MA_LDxI | _MA_WORD, /* LDI @(GRi,d12),GRk */
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[0x33] = _MA_LDxI | _MA_DWORD, /* LDDI @(GRi,d12),GRk */
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[0x36] = _MA_LDxI | _MA_HALF, /* LDUHI @(GRi,d12),GRk */
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[0x51] = _MA_STxI | _MA_HALF, /* STHI @(GRi,d12),GRk */
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[0x52] = _MA_STxI | _MA_WORD, /* STI @(GRi,d12),GRk */
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[0x53] = _MA_STxI | _MA_DWORD, /* STDI @(GRi,d12),GRk */
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};
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/*****************************************************************************/
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/*
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* see if we can handle the exception by fixing up a misaligned memory access
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*/
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int handle_misalignment(unsigned long esr0, unsigned long ear0, unsigned long epcr0)
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{
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unsigned long insn, addr, *greg;
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int GRi, GRj, GRk, D12, op;
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union {
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uint64_t _64;
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uint32_t _32[2];
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uint16_t _16;
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uint8_t _8[8];
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} x;
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if (!(esr0 & ESR0_EAV) || !(epcr0 & EPCR0_V) || !(ear0 & 7))
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return -EAGAIN;
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epcr0 &= EPCR0_PC;
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if (__frame->pc != epcr0) {
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kdebug("MISALIGN: Execution not halted on excepting instruction\n");
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BUG();
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}
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if (__get_user(insn, (unsigned long *) epcr0) < 0)
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return -EFAULT;
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/* determine the instruction type first */
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switch ((insn >> 18) & 0x7f) {
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case 0x2:
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/* LDx @(GRi,GRj),GRk */
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op = tbl_LDGRk_reg[(insn >> 6) & 0x3f];
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break;
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case 0x3:
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/* STx GRk,@(GRi,GRj) */
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op = tbl_STGRk_reg[(insn >> 6) & 0x3f];
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break;
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default:
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op = tbl_LDSTGRk_imm[(insn >> 18) & 0x7f];
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break;
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}
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if (!op)
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return -EAGAIN;
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kdebug("MISALIGN: pc=%08lx insn=%08lx ad=%08lx op=%02x\n", epcr0, insn, ear0, op);
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memset(&x, 0xba, 8);
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/* validate the instruction parameters */
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greg = (unsigned long *) &__frame->tbr;
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GRi = (insn >> 12) & 0x3f;
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GRk = (insn >> 25) & 0x3f;
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if (GRi > 31 || GRk > 31)
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return -ENOENT;
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if (op & _MA_DWORD && GRk & 1)
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return -EINVAL;
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if (op & _MA_IMM) {
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D12 = insn & 0xfff;
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asm ("slli %0,#20,%0 ! srai %0,#20,%0" : "=r"(D12) : "0"(D12)); /* sign extend */
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addr = (GRi ? greg[GRi] : 0) + D12;
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}
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else {
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GRj = (insn >> 0) & 0x3f;
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if (GRj > 31)
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return -ENOENT;
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addr = (GRi ? greg[GRi] : 0) + (GRj ? greg[GRj] : 0);
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}
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if (addr != ear0) {
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kdebug("MISALIGN: Calculated addr (%08lx) does not match EAR0 (%08lx)\n",
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addr, ear0);
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return -EFAULT;
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}
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/* check the address is okay */
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if (user_mode(__frame) && ___range_ok(ear0, 8) < 0)
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return -EFAULT;
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/* perform the memory op */
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if (op & _MA_STORE) {
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/* perform a store */
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x._32[0] = 0;
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if (GRk != 0) {
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if (op & _MA_HALF) {
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x._16 = greg[GRk];
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}
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else {
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x._32[0] = greg[GRk];
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}
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}
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if (op & _MA_DWORD)
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x._32[1] = greg[GRk + 1];
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kdebug("MISALIGN: Store GR%d { %08x:%08x } -> %08lx (%dB)\n",
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GRk, x._32[1], x._32[0], addr, op & _MA_SZ_MASK);
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if (__memcpy_user((void *) addr, &x, op & _MA_SZ_MASK) != 0)
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return -EFAULT;
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}
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else {
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/* perform a load */
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if (__memcpy_user(&x, (void *) addr, op & _MA_SZ_MASK) != 0)
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return -EFAULT;
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if (op & _MA_HALF) {
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if (op & _MA_SIGNED)
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asm ("slli %0,#16,%0 ! srai %0,#16,%0"
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: "=r"(x._32[0]) : "0"(x._16));
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else
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asm ("sethi #0,%0"
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: "=r"(x._32[0]) : "0"(x._16));
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}
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kdebug("MISALIGN: Load %08lx (%dB) -> GR%d, { %08x:%08x }\n",
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addr, op & _MA_SZ_MASK, GRk, x._32[1], x._32[0]);
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if (GRk != 0)
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greg[GRk] = x._32[0];
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if (op & _MA_DWORD)
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greg[GRk + 1] = x._32[1];
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}
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/* update the base pointer if required */
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if (op & _MA_UPDATE)
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greg[GRi] = addr;
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/* well... we've done that insn */
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__frame->pc = __frame->pc + 4;
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return 0;
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} /* end handle_misalignment() */
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