eabd5c9dd0
In commit 184ecc9eb2
("ptp: Add adjphase
function to support phase offset control.") the PTP Hardware Clock
interface expanded to support the ADJ_OFFSET offset mode. However,
the implementation did not respect the traditional yet pedantic
distinction between units of microseconds and nanoseconds signaled by
the ADJ_NANO flag. This patch fixes the issue by adding logic to
handle that flag.
Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Reviewed-by: Vincent Cheng <vincent.cheng.xh@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
439 lines
9.9 KiB
C
439 lines
9.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PTP 1588 clock support
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*/
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#include <linux/idr.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/posix-clock.h>
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#include <linux/pps_kernel.h>
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#include <linux/slab.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/sched/types.h>
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#include "ptp_private.h"
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#define PTP_MAX_ALARMS 4
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#define PTP_PPS_DEFAULTS (PPS_CAPTUREASSERT | PPS_OFFSETASSERT)
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#define PTP_PPS_EVENT PPS_CAPTUREASSERT
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#define PTP_PPS_MODE (PTP_PPS_DEFAULTS | PPS_CANWAIT | PPS_TSFMT_TSPEC)
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/* private globals */
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static dev_t ptp_devt;
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static struct class *ptp_class;
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static DEFINE_IDA(ptp_clocks_map);
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/* time stamp event queue operations */
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static inline int queue_free(struct timestamp_event_queue *q)
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{
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return PTP_MAX_TIMESTAMPS - queue_cnt(q) - 1;
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}
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static void enqueue_external_timestamp(struct timestamp_event_queue *queue,
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struct ptp_clock_event *src)
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{
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struct ptp_extts_event *dst;
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unsigned long flags;
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s64 seconds;
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u32 remainder;
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seconds = div_u64_rem(src->timestamp, 1000000000, &remainder);
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spin_lock_irqsave(&queue->lock, flags);
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dst = &queue->buf[queue->tail];
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dst->index = src->index;
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dst->t.sec = seconds;
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dst->t.nsec = remainder;
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if (!queue_free(queue))
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queue->head = (queue->head + 1) % PTP_MAX_TIMESTAMPS;
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queue->tail = (queue->tail + 1) % PTP_MAX_TIMESTAMPS;
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spin_unlock_irqrestore(&queue->lock, flags);
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}
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s32 scaled_ppm_to_ppb(long ppm)
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{
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/*
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* The 'freq' field in the 'struct timex' is in parts per
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* million, but with a 16 bit binary fractional field.
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*
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* We want to calculate
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*
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* ppb = scaled_ppm * 1000 / 2^16
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*
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* which simplifies to
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*
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* ppb = scaled_ppm * 125 / 2^13
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*/
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s64 ppb = 1 + ppm;
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ppb *= 125;
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ppb >>= 13;
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return (s32) ppb;
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}
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EXPORT_SYMBOL(scaled_ppm_to_ppb);
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/* posix clock implementation */
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static int ptp_clock_getres(struct posix_clock *pc, struct timespec64 *tp)
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{
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tp->tv_sec = 0;
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tp->tv_nsec = 1;
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return 0;
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}
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static int ptp_clock_settime(struct posix_clock *pc, const struct timespec64 *tp)
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{
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struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);
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return ptp->info->settime64(ptp->info, tp);
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}
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static int ptp_clock_gettime(struct posix_clock *pc, struct timespec64 *tp)
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{
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struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);
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int err;
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if (ptp->info->gettimex64)
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err = ptp->info->gettimex64(ptp->info, tp, NULL);
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else
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err = ptp->info->gettime64(ptp->info, tp);
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return err;
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}
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static int ptp_clock_adjtime(struct posix_clock *pc, struct __kernel_timex *tx)
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{
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struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);
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struct ptp_clock_info *ops;
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int err = -EOPNOTSUPP;
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ops = ptp->info;
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if (tx->modes & ADJ_SETOFFSET) {
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struct timespec64 ts;
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ktime_t kt;
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s64 delta;
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ts.tv_sec = tx->time.tv_sec;
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ts.tv_nsec = tx->time.tv_usec;
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if (!(tx->modes & ADJ_NANO))
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ts.tv_nsec *= 1000;
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if ((unsigned long) ts.tv_nsec >= NSEC_PER_SEC)
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return -EINVAL;
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kt = timespec64_to_ktime(ts);
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delta = ktime_to_ns(kt);
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err = ops->adjtime(ops, delta);
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} else if (tx->modes & ADJ_FREQUENCY) {
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s32 ppb = scaled_ppm_to_ppb(tx->freq);
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if (ppb > ops->max_adj || ppb < -ops->max_adj)
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return -ERANGE;
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if (ops->adjfine)
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err = ops->adjfine(ops, tx->freq);
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else
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err = ops->adjfreq(ops, ppb);
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ptp->dialed_frequency = tx->freq;
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} else if (tx->modes & ADJ_OFFSET) {
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if (ops->adjphase) {
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s32 offset = tx->offset;
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if (!(tx->modes & ADJ_NANO))
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offset *= NSEC_PER_USEC;
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err = ops->adjphase(ops, offset);
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}
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} else if (tx->modes == 0) {
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tx->freq = ptp->dialed_frequency;
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err = 0;
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}
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return err;
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}
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static struct posix_clock_operations ptp_clock_ops = {
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.owner = THIS_MODULE,
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.clock_adjtime = ptp_clock_adjtime,
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.clock_gettime = ptp_clock_gettime,
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.clock_getres = ptp_clock_getres,
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.clock_settime = ptp_clock_settime,
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.ioctl = ptp_ioctl,
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.open = ptp_open,
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.poll = ptp_poll,
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.read = ptp_read,
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};
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static void ptp_clock_release(struct device *dev)
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{
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struct ptp_clock *ptp = container_of(dev, struct ptp_clock, dev);
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ptp_cleanup_pin_groups(ptp);
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mutex_destroy(&ptp->tsevq_mux);
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mutex_destroy(&ptp->pincfg_mux);
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ida_simple_remove(&ptp_clocks_map, ptp->index);
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kfree(ptp);
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}
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static void ptp_aux_kworker(struct kthread_work *work)
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{
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struct ptp_clock *ptp = container_of(work, struct ptp_clock,
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aux_work.work);
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struct ptp_clock_info *info = ptp->info;
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long delay;
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delay = info->do_aux_work(info);
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if (delay >= 0)
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kthread_queue_delayed_work(ptp->kworker, &ptp->aux_work, delay);
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}
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/* public interface */
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struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info,
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struct device *parent)
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{
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struct ptp_clock *ptp;
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int err = 0, index, major = MAJOR(ptp_devt);
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if (info->n_alarm > PTP_MAX_ALARMS)
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return ERR_PTR(-EINVAL);
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/* Initialize a clock structure. */
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err = -ENOMEM;
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ptp = kzalloc(sizeof(struct ptp_clock), GFP_KERNEL);
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if (ptp == NULL)
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goto no_memory;
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index = ida_simple_get(&ptp_clocks_map, 0, MINORMASK + 1, GFP_KERNEL);
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if (index < 0) {
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err = index;
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goto no_slot;
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}
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ptp->clock.ops = ptp_clock_ops;
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ptp->info = info;
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ptp->devid = MKDEV(major, index);
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ptp->index = index;
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spin_lock_init(&ptp->tsevq.lock);
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mutex_init(&ptp->tsevq_mux);
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mutex_init(&ptp->pincfg_mux);
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init_waitqueue_head(&ptp->tsev_wq);
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if (ptp->info->do_aux_work) {
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kthread_init_delayed_work(&ptp->aux_work, ptp_aux_kworker);
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ptp->kworker = kthread_create_worker(0, "ptp%d", ptp->index);
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if (IS_ERR(ptp->kworker)) {
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err = PTR_ERR(ptp->kworker);
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pr_err("failed to create ptp aux_worker %d\n", err);
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goto kworker_err;
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}
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}
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err = ptp_populate_pin_groups(ptp);
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if (err)
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goto no_pin_groups;
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/* Register a new PPS source. */
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if (info->pps) {
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struct pps_source_info pps;
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memset(&pps, 0, sizeof(pps));
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snprintf(pps.name, PPS_MAX_NAME_LEN, "ptp%d", index);
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pps.mode = PTP_PPS_MODE;
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pps.owner = info->owner;
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ptp->pps_source = pps_register_source(&pps, PTP_PPS_DEFAULTS);
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if (IS_ERR(ptp->pps_source)) {
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err = PTR_ERR(ptp->pps_source);
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pr_err("failed to register pps source\n");
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goto no_pps;
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}
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}
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/* Initialize a new device of our class in our clock structure. */
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device_initialize(&ptp->dev);
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ptp->dev.devt = ptp->devid;
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ptp->dev.class = ptp_class;
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ptp->dev.parent = parent;
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ptp->dev.groups = ptp->pin_attr_groups;
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ptp->dev.release = ptp_clock_release;
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dev_set_drvdata(&ptp->dev, ptp);
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dev_set_name(&ptp->dev, "ptp%d", ptp->index);
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/* Create a posix clock and link it to the device. */
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err = posix_clock_register(&ptp->clock, &ptp->dev);
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if (err) {
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pr_err("failed to create posix clock\n");
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goto no_clock;
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}
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return ptp;
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no_clock:
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if (ptp->pps_source)
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pps_unregister_source(ptp->pps_source);
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no_pps:
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ptp_cleanup_pin_groups(ptp);
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no_pin_groups:
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if (ptp->kworker)
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kthread_destroy_worker(ptp->kworker);
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kworker_err:
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mutex_destroy(&ptp->tsevq_mux);
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mutex_destroy(&ptp->pincfg_mux);
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ida_simple_remove(&ptp_clocks_map, index);
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no_slot:
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kfree(ptp);
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no_memory:
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return ERR_PTR(err);
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}
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EXPORT_SYMBOL(ptp_clock_register);
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int ptp_clock_unregister(struct ptp_clock *ptp)
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{
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ptp->defunct = 1;
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wake_up_interruptible(&ptp->tsev_wq);
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if (ptp->kworker) {
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kthread_cancel_delayed_work_sync(&ptp->aux_work);
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kthread_destroy_worker(ptp->kworker);
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}
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/* Release the clock's resources. */
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if (ptp->pps_source)
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pps_unregister_source(ptp->pps_source);
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posix_clock_unregister(&ptp->clock);
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return 0;
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}
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EXPORT_SYMBOL(ptp_clock_unregister);
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void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event)
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{
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struct pps_event_time evt;
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switch (event->type) {
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case PTP_CLOCK_ALARM:
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break;
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case PTP_CLOCK_EXTTS:
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enqueue_external_timestamp(&ptp->tsevq, event);
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wake_up_interruptible(&ptp->tsev_wq);
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break;
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case PTP_CLOCK_PPS:
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pps_get_ts(&evt);
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pps_event(ptp->pps_source, &evt, PTP_PPS_EVENT, NULL);
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break;
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case PTP_CLOCK_PPSUSR:
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pps_event(ptp->pps_source, &event->pps_times,
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PTP_PPS_EVENT, NULL);
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break;
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}
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}
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EXPORT_SYMBOL(ptp_clock_event);
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int ptp_clock_index(struct ptp_clock *ptp)
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{
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return ptp->index;
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}
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EXPORT_SYMBOL(ptp_clock_index);
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int ptp_find_pin(struct ptp_clock *ptp,
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enum ptp_pin_function func, unsigned int chan)
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{
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struct ptp_pin_desc *pin = NULL;
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int i;
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for (i = 0; i < ptp->info->n_pins; i++) {
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if (ptp->info->pin_config[i].func == func &&
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ptp->info->pin_config[i].chan == chan) {
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pin = &ptp->info->pin_config[i];
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break;
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}
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}
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return pin ? i : -1;
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}
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EXPORT_SYMBOL(ptp_find_pin);
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int ptp_find_pin_unlocked(struct ptp_clock *ptp,
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enum ptp_pin_function func, unsigned int chan)
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{
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int result;
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mutex_lock(&ptp->pincfg_mux);
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result = ptp_find_pin(ptp, func, chan);
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mutex_unlock(&ptp->pincfg_mux);
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return result;
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}
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EXPORT_SYMBOL(ptp_find_pin_unlocked);
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int ptp_schedule_worker(struct ptp_clock *ptp, unsigned long delay)
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{
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return kthread_mod_delayed_work(ptp->kworker, &ptp->aux_work, delay);
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}
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EXPORT_SYMBOL(ptp_schedule_worker);
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void ptp_cancel_worker_sync(struct ptp_clock *ptp)
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{
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kthread_cancel_delayed_work_sync(&ptp->aux_work);
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}
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EXPORT_SYMBOL(ptp_cancel_worker_sync);
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/* module operations */
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static void __exit ptp_exit(void)
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{
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class_destroy(ptp_class);
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unregister_chrdev_region(ptp_devt, MINORMASK + 1);
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ida_destroy(&ptp_clocks_map);
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}
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static int __init ptp_init(void)
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{
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int err;
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ptp_class = class_create(THIS_MODULE, "ptp");
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if (IS_ERR(ptp_class)) {
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pr_err("ptp: failed to allocate class\n");
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return PTR_ERR(ptp_class);
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}
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err = alloc_chrdev_region(&ptp_devt, 0, MINORMASK + 1, "ptp");
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if (err < 0) {
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pr_err("ptp: failed to allocate device region\n");
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goto no_region;
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}
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ptp_class->dev_groups = ptp_groups;
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pr_info("PTP clock support registered\n");
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return 0;
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no_region:
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class_destroy(ptp_class);
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return err;
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}
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subsys_initcall(ptp_init);
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module_exit(ptp_exit);
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MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
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MODULE_DESCRIPTION("PTP clocks support");
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MODULE_LICENSE("GPL");
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