589d03e93f
generic_handler_irq() already tests for !desc so use this instead of generic_handle_irq_desc(). Use irq_get_irq_data() instead of desc->irq_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: David Vrabel <david.vrabel@citrix.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Xen <xen-devel@lists.xenproject.org> Link: http://lkml.kernel.org/r/20140223212738.222412125@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
366 lines
10 KiB
C
366 lines
10 KiB
C
/*
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* Xen event channels (2-level ABI)
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*
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* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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*/
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#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
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#include <linux/linkage.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/sync_bitops.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include <xen/xen.h>
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#include <xen/xen-ops.h>
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#include <xen/events.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/event_channel.h>
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#include "events_internal.h"
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/*
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* Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
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* careful to only use bitops which allow for this (e.g
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* test_bit/find_first_bit and friends but not __ffs) and to pass
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* BITS_PER_EVTCHN_WORD as the bitmask length.
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*/
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#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
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/*
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* Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
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* array. Primarily to avoid long lines (hence the terse name).
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*/
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#define BM(x) (unsigned long *)(x)
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/* Find the first set bit in a evtchn mask */
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#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
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static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD],
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cpu_evtchn_mask);
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static unsigned evtchn_2l_max_channels(void)
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{
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return EVTCHN_2L_NR_CHANNELS;
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}
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static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
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{
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clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
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set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
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}
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static void evtchn_2l_clear_pending(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_clear_bit(port, BM(&s->evtchn_pending[0]));
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}
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static void evtchn_2l_set_pending(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, BM(&s->evtchn_pending[0]));
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}
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static bool evtchn_2l_is_pending(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_bit(port, BM(&s->evtchn_pending[0]));
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}
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static bool evtchn_2l_test_and_set_mask(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
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}
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static void evtchn_2l_mask(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, BM(&s->evtchn_mask[0]));
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}
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static void evtchn_2l_unmask(unsigned port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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unsigned int cpu = get_cpu();
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int do_hypercall = 0, evtchn_pending = 0;
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BUG_ON(!irqs_disabled());
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if (unlikely((cpu != cpu_from_evtchn(port))))
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do_hypercall = 1;
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else {
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/*
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* Need to clear the mask before checking pending to
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* avoid a race with an event becoming pending.
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*
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* EVTCHNOP_unmask will only trigger an upcall if the
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* mask bit was set, so if a hypercall is needed
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* remask the event.
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*/
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sync_clear_bit(port, BM(&s->evtchn_mask[0]));
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evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
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if (unlikely(evtchn_pending && xen_hvm_domain())) {
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sync_set_bit(port, BM(&s->evtchn_mask[0]));
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do_hypercall = 1;
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}
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}
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/* Slow path (hypercall) if this is a non-local port or if this is
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* an hvm domain and an event is pending (hvm domains don't have
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* their own implementation of irq_enable). */
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if (do_hypercall) {
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struct evtchn_unmask unmask = { .port = port };
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(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
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} else {
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struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
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/*
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* The following is basically the equivalent of
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* 'hw_resend_irq'. Just like a real IO-APIC we 'lose
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* the interrupt edge' if the channel is masked.
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*/
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if (evtchn_pending &&
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!sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
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BM(&vcpu_info->evtchn_pending_sel)))
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vcpu_info->evtchn_upcall_pending = 1;
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}
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put_cpu();
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}
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static DEFINE_PER_CPU(unsigned int, current_word_idx);
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static DEFINE_PER_CPU(unsigned int, current_bit_idx);
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/*
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* Mask out the i least significant bits of w
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*/
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#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
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static inline xen_ulong_t active_evtchns(unsigned int cpu,
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struct shared_info *sh,
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unsigned int idx)
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{
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return sh->evtchn_pending[idx] &
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per_cpu(cpu_evtchn_mask, cpu)[idx] &
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~sh->evtchn_mask[idx];
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}
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/*
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* Search the CPU's pending events bitmasks. For each one found, map
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* the event number to an irq, and feed it into do_IRQ() for handling.
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*
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* Xen uses a two-level bitmap to speed searching. The first level is
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* a bitset of words which contain pending event bits. The second
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* level is a bitset of pending events themselves.
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*/
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static void evtchn_2l_handle_events(unsigned cpu)
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{
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int irq;
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xen_ulong_t pending_words;
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xen_ulong_t pending_bits;
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int start_word_idx, start_bit_idx;
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int word_idx, bit_idx;
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int i;
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struct shared_info *s = HYPERVISOR_shared_info;
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struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
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/* Timer interrupt has highest priority. */
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irq = irq_from_virq(cpu, VIRQ_TIMER);
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if (irq != -1) {
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unsigned int evtchn = evtchn_from_irq(irq);
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word_idx = evtchn / BITS_PER_LONG;
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bit_idx = evtchn % BITS_PER_LONG;
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if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
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generic_handle_irq(irq);
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}
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/*
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* Master flag must be cleared /before/ clearing
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* selector flag. xchg_xen_ulong must contain an
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* appropriate barrier.
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*/
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pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
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start_word_idx = __this_cpu_read(current_word_idx);
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start_bit_idx = __this_cpu_read(current_bit_idx);
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word_idx = start_word_idx;
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for (i = 0; pending_words != 0; i++) {
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xen_ulong_t words;
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words = MASK_LSBS(pending_words, word_idx);
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/*
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* If we masked out all events, wrap to beginning.
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*/
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if (words == 0) {
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word_idx = 0;
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bit_idx = 0;
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continue;
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}
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word_idx = EVTCHN_FIRST_BIT(words);
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pending_bits = active_evtchns(cpu, s, word_idx);
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bit_idx = 0; /* usually scan entire word from start */
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/*
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* We scan the starting word in two parts.
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*
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* 1st time: start in the middle, scanning the
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* upper bits.
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*
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* 2nd time: scan the whole word (not just the
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* parts skipped in the first pass) -- if an
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* event in the previously scanned bits is
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* pending again it would just be scanned on
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* the next loop anyway.
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*/
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if (word_idx == start_word_idx) {
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if (i == 0)
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bit_idx = start_bit_idx;
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}
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do {
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xen_ulong_t bits;
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int port;
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bits = MASK_LSBS(pending_bits, bit_idx);
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/* If we masked out all events, move on. */
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if (bits == 0)
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break;
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bit_idx = EVTCHN_FIRST_BIT(bits);
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/* Process port. */
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port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
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irq = get_evtchn_to_irq(port);
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if (irq != -1)
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generic_handle_irq(irq);
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bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
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/* Next caller starts at last processed + 1 */
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__this_cpu_write(current_word_idx,
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bit_idx ? word_idx :
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(word_idx+1) % BITS_PER_EVTCHN_WORD);
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__this_cpu_write(current_bit_idx, bit_idx);
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} while (bit_idx != 0);
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/* Scan start_l1i twice; all others once. */
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if ((word_idx != start_word_idx) || (i != 0))
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pending_words &= ~(1UL << word_idx);
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word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
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}
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}
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irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
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{
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struct shared_info *sh = HYPERVISOR_shared_info;
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int cpu = smp_processor_id();
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xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
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int i;
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unsigned long flags;
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static DEFINE_SPINLOCK(debug_lock);
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struct vcpu_info *v;
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spin_lock_irqsave(&debug_lock, flags);
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printk("\nvcpu %d\n ", cpu);
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for_each_online_cpu(i) {
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int pending;
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v = per_cpu(xen_vcpu, i);
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pending = (get_irq_regs() && i == cpu)
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? xen_irqs_disabled(get_irq_regs())
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: v->evtchn_upcall_mask;
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printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
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pending, v->evtchn_upcall_pending,
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(int)(sizeof(v->evtchn_pending_sel)*2),
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v->evtchn_pending_sel);
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}
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v = per_cpu(xen_vcpu, cpu);
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printk("\npending:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)sizeof(sh->evtchn_pending[0])*2,
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sh->evtchn_pending[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobal mask:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocal cpu%d mask:\n ", cpu);
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for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
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cpu_evtchn[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
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xen_ulong_t pending = sh->evtchn_pending[i]
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& ~sh->evtchn_mask[i]
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& cpu_evtchn[i];
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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pending, i % 8 == 0 ? "\n " : " ");
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}
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printk("\npending list:\n");
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for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
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if (sync_test_bit(i, BM(sh->evtchn_pending))) {
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int word_idx = i / BITS_PER_EVTCHN_WORD;
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printk(" %d: event %d -> irq %d%s%s%s\n",
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cpu_from_evtchn(i), i,
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get_evtchn_to_irq(i),
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sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
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? "" : " l2-clear",
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!sync_test_bit(i, BM(sh->evtchn_mask))
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? "" : " globally-masked",
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sync_test_bit(i, BM(cpu_evtchn))
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? "" : " locally-masked");
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}
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}
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spin_unlock_irqrestore(&debug_lock, flags);
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return IRQ_HANDLED;
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}
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static const struct evtchn_ops evtchn_ops_2l = {
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.max_channels = evtchn_2l_max_channels,
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.nr_channels = evtchn_2l_max_channels,
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.bind_to_cpu = evtchn_2l_bind_to_cpu,
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.clear_pending = evtchn_2l_clear_pending,
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.set_pending = evtchn_2l_set_pending,
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.is_pending = evtchn_2l_is_pending,
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.test_and_set_mask = evtchn_2l_test_and_set_mask,
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.mask = evtchn_2l_mask,
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.unmask = evtchn_2l_unmask,
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.handle_events = evtchn_2l_handle_events,
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};
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void __init xen_evtchn_2l_init(void)
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{
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pr_info("Using 2-level ABI\n");
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evtchn_ops = &evtchn_ops_2l;
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}
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