9ac7849e35
Implement device resource management, in short, devres. A device driver can allocate arbirary size of devres data which is associated with a release function. On driver detach, release function is invoked on the devres data, then, devres data is freed. devreses are typed by associated release functions. Some devreses are better represented by single instance of the type while others need multiple instances sharing the same release function. Both usages are supported. devreses can be grouped using devres group such that a device driver can easily release acquired resources halfway through initialization or selectively release resources (e.g. resources for port 1 out of 4 ports). This patch adds devres core including documentation and the following managed interfaces. * alloc/free : devm_kzalloc(), devm_kzfree() * IO region : devm_request_region(), devm_release_region() * IRQ : devm_request_irq(), devm_free_irq() * DMA : dmam_alloc_coherent(), dmam_free_coherent(), dmam_declare_coherent_memory(), dmam_pool_create(), dmam_pool_destroy() * PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed() * iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(), devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(), pcim_iomap(), pcim_iounmap() Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
#ifndef _ASM_LINUX_DMA_MAPPING_H
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#define _ASM_LINUX_DMA_MAPPING_H
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#include <linux/device.h>
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#include <linux/err.h>
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/* These definitions mirror those in pci.h, so they can be used
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* interchangeably with their PCI_ counterparts */
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enum dma_data_direction {
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DMA_BIDIRECTIONAL = 0,
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DMA_TO_DEVICE = 1,
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DMA_FROM_DEVICE = 2,
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DMA_NONE = 3,
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};
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#define DMA_64BIT_MASK 0xffffffffffffffffULL
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#define DMA_48BIT_MASK 0x0000ffffffffffffULL
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#define DMA_40BIT_MASK 0x000000ffffffffffULL
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#define DMA_39BIT_MASK 0x0000007fffffffffULL
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#define DMA_32BIT_MASK 0x00000000ffffffffULL
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#define DMA_31BIT_MASK 0x000000007fffffffULL
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#define DMA_30BIT_MASK 0x000000003fffffffULL
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#define DMA_29BIT_MASK 0x000000001fffffffULL
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#define DMA_28BIT_MASK 0x000000000fffffffULL
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#define DMA_24BIT_MASK 0x0000000000ffffffULL
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static inline int valid_dma_direction(int dma_direction)
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{
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return ((dma_direction == DMA_BIDIRECTIONAL) ||
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(dma_direction == DMA_TO_DEVICE) ||
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(dma_direction == DMA_FROM_DEVICE));
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}
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#include <asm/dma-mapping.h>
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/* Backwards compat, remove in 2.7.x */
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#define dma_sync_single dma_sync_single_for_cpu
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#define dma_sync_sg dma_sync_sg_for_cpu
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extern u64 dma_get_required_mask(struct device *dev);
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/* flags for the coherent memory api */
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#define DMA_MEMORY_MAP 0x01
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#define DMA_MEMORY_IO 0x02
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#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
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#define DMA_MEMORY_EXCLUSIVE 0x08
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#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
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static inline int
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dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size, int flags)
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{
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return 0;
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}
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static inline void
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dma_release_declared_memory(struct device *dev)
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{
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}
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static inline void *
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dma_mark_declared_memory_occupied(struct device *dev,
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dma_addr_t device_addr, size_t size)
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{
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return ERR_PTR(-EBUSY);
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}
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#endif
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/*
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* Managed DMA API
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*/
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extern void *dmam_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
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extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size,
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int flags);
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extern void dmam_release_declared_memory(struct device *dev);
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#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
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static inline int dmam_declare_coherent_memory(struct device *dev,
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dma_addr_t bus_addr, dma_addr_t device_addr,
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size_t size, gfp_t gfp)
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{
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return 0;
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}
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static inline void dmam_release_declared_memory(struct device *dev)
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{
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}
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#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
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#endif
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