7350f41972
Wrong MPP configuration would cause <cpu>_mpp_conf loop infinitely because the mpp list iterator would not be incremented. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
169 lines
3.1 KiB
C
169 lines
3.1 KiB
C
/*
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* arch/arm/mach-orion5x/mpp.c
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*
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* MPP functions for Marvell Orion 5x SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/mbus.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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#include <mach/hardware.h>
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#include "common.h"
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#include "mpp.h"
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static int is_5181l(void)
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{
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u32 dev;
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u32 rev;
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orion5x_pcie_id(&dev, &rev);
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return !!(dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0);
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}
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static int is_5182(void)
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{
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u32 dev;
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u32 rev;
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orion5x_pcie_id(&dev, &rev);
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return !!(dev == MV88F5182_DEV_ID);
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}
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static int is_5281(void)
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{
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u32 dev;
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u32 rev;
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orion5x_pcie_id(&dev, &rev);
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return !!(dev == MV88F5281_DEV_ID);
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}
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static int __init determine_type_encoding(int mpp, enum orion5x_mpp_type type)
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{
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switch (type) {
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case MPP_UNUSED:
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case MPP_GPIO:
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if (mpp == 0)
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return 3;
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if (mpp >= 1 && mpp <= 15)
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return 0;
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if (mpp >= 16 && mpp <= 19) {
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if (is_5182())
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return 5;
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if (type == MPP_UNUSED)
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return 0;
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}
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return -1;
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case MPP_PCIE_RST_OUTn:
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if (mpp == 0)
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return 0;
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return -1;
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case MPP_PCI_ARB:
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if (mpp >= 0 && mpp <= 7)
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return 2;
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return -1;
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case MPP_PCI_PMEn:
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if (mpp == 2)
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return 3;
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return -1;
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case MPP_GIGE:
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if (mpp >= 8 && mpp <= 19)
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return 1;
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return -1;
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case MPP_NAND:
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if (is_5182() || is_5281()) {
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if (mpp >= 4 && mpp <= 7)
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return 4;
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if (mpp >= 12 && mpp <= 17)
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return 4;
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}
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return -1;
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case MPP_PCI_CLK:
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if (is_5181l() && mpp >= 6 && mpp <= 7)
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return 5;
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return -1;
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case MPP_SATA_LED:
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if (is_5182()) {
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if (mpp >= 4 && mpp <= 7)
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return 5;
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if (mpp >= 12 && mpp <= 15)
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return 5;
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}
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return -1;
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case MPP_UART:
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if (mpp >= 16 && mpp <= 19)
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return 0;
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return -1;
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}
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printk(KERN_INFO "unknown MPP type %d\n", type);
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return -1;
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}
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void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
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{
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u32 mpp_0_7_ctrl = readl(MPP_0_7_CTRL);
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u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL);
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u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL);
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/* Initialize gpiolib. */
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orion_gpio_init();
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for ( ; mode->mpp >= 0; mode++) {
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u32 *reg;
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int num_type;
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int shift;
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if (mode->mpp >= 0 && mode->mpp <= 7)
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reg = &mpp_0_7_ctrl;
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else if (mode->mpp >= 8 && mode->mpp <= 15)
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reg = &mpp_8_15_ctrl;
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else if (mode->mpp >= 16 && mode->mpp <= 19)
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reg = &mpp_16_19_ctrl;
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else {
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printk(KERN_ERR "orion5x_mpp_conf: invalid MPP "
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"(%d)\n", mode->mpp);
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continue;
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}
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num_type = determine_type_encoding(mode->mpp, mode->type);
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if (num_type < 0) {
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printk(KERN_ERR "orion5x_mpp_conf: invalid MPP "
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"combination (%d, %d)\n", mode->mpp,
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mode->type);
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continue;
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}
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shift = (mode->mpp & 7) << 2;
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*reg &= ~(0xf << shift);
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*reg |= (num_type & 0xf) << shift;
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if (mode->type == MPP_UNUSED && (mode->mpp < 16 || is_5182()))
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orion_gpio_set_unused(mode->mpp);
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orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
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}
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writel(mpp_0_7_ctrl, MPP_0_7_CTRL);
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writel(mpp_8_15_ctrl, MPP_8_15_CTRL);
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writel(mpp_16_19_ctrl, MPP_16_19_CTRL);
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}
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