9ec4fa271f
CPUMASKS_OFFSTACK is not defined anywhere (it is CPUMASK_OFFSTACK). It is a typo and init_allocate_desc_masks() is called before it set affinity to all cpus... Split init_alloc_desc_masks() into all_desc_masks() and init_desc_masks(). Also use CPUMASK_OFFSTACK in alloc_desc_masks(). [ Impact: fix smp_affinity copying/setup when moving irq_desc between CPUs ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Acked-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> LKML-Reference: <49F6546E.3040406@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
529 lines
16 KiB
C
529 lines
16 KiB
C
#ifndef _LINUX_IRQ_H
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#define _LINUX_IRQ_H
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/*
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* Please do not include this file in generic code. There is currently
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* no requirement for any architecture to implement anything held
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* within this file.
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*
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* Thanks. --rmk
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*/
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#include <linux/smp.h>
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#ifndef CONFIG_S390
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#include <linux/linkage.h>
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/cpumask.h>
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#include <linux/gfp.h>
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#include <linux/irqreturn.h>
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#include <linux/irqnr.h>
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#include <linux/errno.h>
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#include <linux/topology.h>
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#include <linux/wait.h>
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#include <asm/irq.h>
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#include <asm/ptrace.h>
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#include <asm/irq_regs.h>
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struct irq_desc;
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typedef void (*irq_flow_handler_t)(unsigned int irq,
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struct irq_desc *desc);
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/*
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* IRQ line status.
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*
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* Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
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*
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* IRQ types
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*/
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#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
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#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
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#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
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#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
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#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
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#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
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#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
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#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
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/* Internal flags */
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#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
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#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
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#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
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#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
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#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
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#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
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#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
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#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
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#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
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#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
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#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
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#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
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#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
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#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
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#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
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#define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
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#define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
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#define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
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#define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */
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#ifdef CONFIG_IRQ_PER_CPU
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# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
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# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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#else
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# define CHECK_IRQ_PER_CPU(var) 0
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# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
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#endif
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struct proc_dir_entry;
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struct msi_desc;
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/**
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* struct irq_chip - hardware interrupt chip descriptor
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*
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* @name: name for /proc/interrupts
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* @startup: start up the interrupt (defaults to ->enable if NULL)
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* @shutdown: shut down the interrupt (defaults to ->disable if NULL)
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* @enable: enable the interrupt (defaults to chip->unmask if NULL)
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* @disable: disable the interrupt (defaults to chip->mask if NULL)
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* @ack: start of a new interrupt
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* @mask: mask an interrupt source
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* @mask_ack: ack and mask an interrupt source
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* @unmask: unmask an interrupt source
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* @eoi: end of interrupt - chip level
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* @end: end of interrupt - flow level
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* @set_affinity: set the CPU affinity on SMP machines
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* @retrigger: resend an IRQ to the CPU
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* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
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* @set_wake: enable/disable power-management wake-on of an IRQ
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*
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* @release: release function solely used by UML
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* @typename: obsoleted by name, kept as migration helper
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*/
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struct irq_chip {
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const char *name;
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unsigned int (*startup)(unsigned int irq);
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void (*shutdown)(unsigned int irq);
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void (*enable)(unsigned int irq);
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void (*disable)(unsigned int irq);
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void (*ack)(unsigned int irq);
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void (*mask)(unsigned int irq);
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void (*mask_ack)(unsigned int irq);
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void (*unmask)(unsigned int irq);
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void (*eoi)(unsigned int irq);
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void (*end)(unsigned int irq);
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void (*set_affinity)(unsigned int irq,
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const struct cpumask *dest);
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int (*retrigger)(unsigned int irq);
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int (*set_type)(unsigned int irq, unsigned int flow_type);
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int (*set_wake)(unsigned int irq, unsigned int on);
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/* Currently used only by UML, might disappear one day.*/
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#ifdef CONFIG_IRQ_RELEASE_METHOD
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void (*release)(unsigned int irq, void *dev_id);
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#endif
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/*
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* For compatibility, ->typename is copied into ->name.
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* Will disappear.
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*/
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const char *typename;
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};
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struct timer_rand_state;
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struct irq_2_iommu;
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/**
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* struct irq_desc - interrupt descriptor
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* @irq: interrupt number for this descriptor
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* @timer_rand_state: pointer to timer rand state struct
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* @kstat_irqs: irq stats per cpu
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* @irq_2_iommu: iommu with this irq
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* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
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* @chip: low level interrupt hardware access
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* @msi_desc: MSI descriptor
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* @handler_data: per-IRQ data for the irq_chip methods
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* @chip_data: platform-specific per-chip private data for the chip
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* methods, to allow shared chip implementations
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* @action: the irq action chain
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* @status: status information
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* @depth: disable-depth, for nested irq_disable() calls
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* @wake_depth: enable depth, for multiple set_irq_wake() callers
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* @irq_count: stats field to detect stalled irqs
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* @last_unhandled: aging timer for unhandled count
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* @irqs_unhandled: stats field for spurious unhandled interrupts
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* @lock: locking for SMP
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* @affinity: IRQ affinity on SMP
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* @cpu: cpu index useful for balancing
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* @pending_mask: pending rebalanced interrupts
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* @threads_active: number of irqaction threads currently running
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* @wait_for_threads: wait queue for sync_irq to wait for threaded handlers
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* @dir: /proc/irq/ procfs entry
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* @name: flow handler name for /proc/interrupts output
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*/
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struct irq_desc {
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unsigned int irq;
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struct timer_rand_state *timer_rand_state;
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unsigned int *kstat_irqs;
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#ifdef CONFIG_INTR_REMAP
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struct irq_2_iommu *irq_2_iommu;
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#endif
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irq_flow_handler_t handle_irq;
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struct irq_chip *chip;
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struct msi_desc *msi_desc;
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void *handler_data;
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void *chip_data;
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struct irqaction *action; /* IRQ action list */
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unsigned int status; /* IRQ status */
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unsigned int depth; /* nested irq disables */
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unsigned int wake_depth; /* nested wake enables */
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unsigned int irq_count; /* For detecting broken IRQs */
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unsigned long last_unhandled; /* Aging timer for unhandled count */
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unsigned int irqs_unhandled;
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spinlock_t lock;
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#ifdef CONFIG_SMP
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cpumask_var_t affinity;
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unsigned int cpu;
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_var_t pending_mask;
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#endif
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#endif
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atomic_t threads_active;
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wait_queue_head_t wait_for_threads;
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#ifdef CONFIG_PROC_FS
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struct proc_dir_entry *dir;
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#endif
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const char *name;
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} ____cacheline_internodealigned_in_smp;
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extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
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struct irq_desc *desc, int cpu);
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extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
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#ifndef CONFIG_SPARSE_IRQ
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extern struct irq_desc irq_desc[NR_IRQS];
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#else /* CONFIG_SPARSE_IRQ */
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extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu);
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#endif /* CONFIG_SPARSE_IRQ */
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extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu);
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static inline struct irq_desc *
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irq_remap_to_desc(unsigned int irq, struct irq_desc *desc)
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{
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#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
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return irq_to_desc(irq);
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#else
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return desc;
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#endif
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}
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/*
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* Migration helpers for obsolete names, they will go away:
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*/
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#define hw_interrupt_type irq_chip
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#define no_irq_type no_irq_chip
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typedef struct irq_desc irq_desc_t;
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/*
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* Pick up the arch-dependent methods:
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*/
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#include <asm/hw_irq.h>
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extern int setup_irq(unsigned int irq, struct irqaction *new);
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extern void remove_irq(unsigned int irq, struct irqaction *act);
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#ifdef CONFIG_GENERIC_HARDIRQS
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#ifdef CONFIG_SMP
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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void move_native_irq(int irq);
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void move_masked_irq(int irq);
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#else /* CONFIG_GENERIC_PENDING_IRQ */
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static inline void move_irq(int irq)
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{
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}
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static inline void move_native_irq(int irq)
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{
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}
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static inline void move_masked_irq(int irq)
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{
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}
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#endif /* CONFIG_GENERIC_PENDING_IRQ */
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#else /* CONFIG_SMP */
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#define move_native_irq(x)
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#define move_masked_irq(x)
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#endif /* CONFIG_SMP */
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extern int no_irq_affinity;
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static inline int irq_balancing_disabled(unsigned int irq)
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{
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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return desc->status & IRQ_NO_BALANCING_MASK;
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}
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/* Handle irq action chains: */
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extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
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/*
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* Built-in IRQ handlers for various IRQ types,
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* callable via desc->chip->handle_irq()
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*/
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extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
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extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
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extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
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extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
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extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
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extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
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/*
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* Monolithic do_IRQ implementation.
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*/
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#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
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extern unsigned int __do_IRQ(unsigned int irq);
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#endif
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/*
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* Architectures call this to let the generic IRQ layer
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* handle an interrupt. If the descriptor is attached to an
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* irqchip-style controller then we call the ->handle_irq() handler,
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* and it calls __do_IRQ() if it's attached to an irqtype-style controller.
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*/
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static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
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{
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#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
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desc->handle_irq(irq, desc);
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#else
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if (likely(desc->handle_irq))
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desc->handle_irq(irq, desc);
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else
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__do_IRQ(irq);
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#endif
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}
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static inline void generic_handle_irq(unsigned int irq)
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{
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generic_handle_irq_desc(irq, irq_to_desc(irq));
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}
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/* Handling of unhandled and spurious interrupts: */
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extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
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irqreturn_t action_ret);
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/* Resending of interrupts :*/
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void check_irq_resend(struct irq_desc *desc, unsigned int irq);
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/* Enable/disable irq debugging output: */
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extern int noirqdebug_setup(char *str);
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/* Checks whether the interrupt can be requested by request_irq(): */
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extern int can_request_irq(unsigned int irq, unsigned long irqflags);
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/* Dummy irq-chip implementations: */
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extern struct irq_chip no_irq_chip;
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extern struct irq_chip dummy_irq_chip;
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extern void
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set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
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irq_flow_handler_t handle);
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extern void
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set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
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irq_flow_handler_t handle, const char *name);
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extern void
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__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
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const char *name);
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/* caller has locked the irq_desc and both params are valid */
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static inline void __set_irq_handler_unlocked(int irq,
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irq_flow_handler_t handler)
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{
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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desc->handle_irq = handler;
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}
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/*
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* Set a highlevel flow handler for a given IRQ:
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*/
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static inline void
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set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
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{
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__set_irq_handler(irq, handle, 0, NULL);
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}
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/*
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* Set a highlevel chained flow handler for a given IRQ.
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* (a chained handler is automatically enabled and set to
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* IRQ_NOREQUEST and IRQ_NOPROBE)
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*/
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static inline void
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set_irq_chained_handler(unsigned int irq,
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irq_flow_handler_t handle)
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{
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__set_irq_handler(irq, handle, 1, NULL);
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}
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extern void set_irq_noprobe(unsigned int irq);
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extern void set_irq_probe(unsigned int irq);
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/* Handle dynamic irq creation and destruction */
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extern unsigned int create_irq_nr(unsigned int irq_want);
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extern int create_irq(void);
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extern void destroy_irq(unsigned int irq);
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/* Test to see if a driver has successfully requested an irq */
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static inline int irq_has_action(unsigned int irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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return desc->action != NULL;
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}
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/* Dynamic irq helper functions */
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extern void dynamic_irq_init(unsigned int irq);
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extern void dynamic_irq_cleanup(unsigned int irq);
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/* Set/get chip/data for an IRQ: */
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extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
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extern int set_irq_data(unsigned int irq, void *data);
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extern int set_irq_chip_data(unsigned int irq, void *data);
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extern int set_irq_type(unsigned int irq, unsigned int type);
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extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
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#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
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#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
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#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
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#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
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#define get_irq_desc_chip(desc) ((desc)->chip)
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#define get_irq_desc_chip_data(desc) ((desc)->chip_data)
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#define get_irq_desc_data(desc) ((desc)->handler_data)
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#define get_irq_desc_msi(desc) ((desc)->msi_desc)
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#endif /* CONFIG_GENERIC_HARDIRQS */
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#endif /* !CONFIG_S390 */
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#ifdef CONFIG_SMP
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/**
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* alloc_desc_masks - allocate cpumasks for irq_desc
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* @desc: pointer to irq_desc struct
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* @cpu: cpu which will be handling the cpumasks
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* @boot: true if need bootmem
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*
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* Allocates affinity and pending_mask cpumask if required.
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* Returns true if successful (or not required).
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*/
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static inline bool alloc_desc_masks(struct irq_desc *desc, int cpu,
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bool boot)
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{
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#ifdef CONFIG_CPUMASK_OFFSTACK
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int node;
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if (boot) {
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alloc_bootmem_cpumask_var(&desc->affinity);
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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alloc_bootmem_cpumask_var(&desc->pending_mask);
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#endif
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return true;
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}
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node = cpu_to_node(cpu);
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if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node))
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return false;
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) {
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free_cpumask_var(desc->affinity);
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return false;
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}
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#endif
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#endif
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return true;
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}
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static inline void init_desc_masks(struct irq_desc *desc)
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{
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cpumask_setall(desc->affinity);
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_clear(desc->pending_mask);
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#endif
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}
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/**
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* init_copy_desc_masks - copy cpumasks for irq_desc
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* @old_desc: pointer to old irq_desc struct
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* @new_desc: pointer to new irq_desc struct
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*
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* Insures affinity and pending_masks are copied to new irq_desc.
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* If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
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* irq_desc struct so the copy is redundant.
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*/
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static inline void init_copy_desc_masks(struct irq_desc *old_desc,
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struct irq_desc *new_desc)
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{
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#ifdef CONFIG_CPUMASK_OFFSTACK
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cpumask_copy(new_desc->affinity, old_desc->affinity);
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|
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
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#endif
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#endif
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}
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static inline void free_desc_masks(struct irq_desc *old_desc,
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struct irq_desc *new_desc)
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|
{
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free_cpumask_var(old_desc->affinity);
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|
|
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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free_cpumask_var(old_desc->pending_mask);
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#endif
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}
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#else /* !CONFIG_SMP */
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static inline bool alloc_desc_masks(struct irq_desc *desc, int cpu,
|
|
bool boot)
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|
{
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|
return true;
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|
}
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|
|
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static inline void init_desc_masks(struct irq_desc *desc)
|
|
{
|
|
}
|
|
|
|
static inline void init_copy_desc_masks(struct irq_desc *old_desc,
|
|
struct irq_desc *new_desc)
|
|
{
|
|
}
|
|
|
|
static inline void free_desc_masks(struct irq_desc *old_desc,
|
|
struct irq_desc *new_desc)
|
|
{
|
|
}
|
|
#endif /* CONFIG_SMP */
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|
|
|
#endif /* _LINUX_IRQ_H */
|