7c2740f1c1
manipulation of the interrupt mask register atomic by disabling interrupts. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
37 lines
780 B
C
37 lines
780 B
C
#ifndef _ASM_MACH_MMZONE_H
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#define _ASM_MACH_MMZONE_H
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#include <asm/sn/addrs.h>
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#include <asm/sn/arch.h>
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#include <asm/sn/hub.h>
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#define pa_to_nid(addr) NASID_TO_COMPACT_NODEID(NASID_GET(addr))
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#define LEVELS_PER_SLICE 128
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struct slice_data {
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unsigned long irq_enable_mask[2];
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int level_to_irq[LEVELS_PER_SLICE];
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};
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struct hub_data {
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kern_vars_t kern_vars;
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DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
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cpumask_t h_cpus;
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unsigned long slice_map;
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unsigned long irq_alloc_mask[2];
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struct slice_data slice[2];
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};
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struct node_data {
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struct pglist_data pglist;
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struct hub_data hub;
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};
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extern struct node_data *__node_data[];
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#define NODE_DATA(n) (&__node_data[(n)]->pglist)
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#define hub_data(n) (&__node_data[(n)]->hub)
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#endif /* _ASM_MACH_MMZONE_H */
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