ab6f6d8521
Current FSI driver required set_rate() platform callback function to set audio clock if it was master mode, because it seemed that CPG/FSI-DIV clocks calculation depend on platform/board/cpu. But it was calculable regardless of platform. This patch supports audio clock calculation method, but the sampling rate under 32kHz is not supported at this point. Old type set_rate() is still supported now, but it will be deleted on next version Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
98 lines
2.2 KiB
C
98 lines
2.2 KiB
C
#ifndef __SOUND_FSI_H
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#define __SOUND_FSI_H
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/*
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* Fifo-attached Serial Interface (FSI) support for SH7724
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define FSI_PORT_A 0
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#define FSI_PORT_B 1
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#include <linux/clk.h>
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#include <sound/soc.h>
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/*
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* flags format
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*
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* 0x00000CBA
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*
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* A: inversion
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* B: format mode
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* C: chip specific
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* D: clock selecter if master mode
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*/
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/* A: clock inversion */
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#define SH_FSI_INVERSION_MASK 0x0000000F
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#define SH_FSI_LRM_INV (1 << 0)
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#define SH_FSI_BRM_INV (1 << 1)
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#define SH_FSI_LRS_INV (1 << 2)
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#define SH_FSI_BRS_INV (1 << 3)
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/* B: format mode */
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#define SH_FSI_FMT_MASK 0x000000F0
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#define SH_FSI_FMT_DAI (0 << 4)
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#define SH_FSI_FMT_SPDIF (1 << 4)
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/* C: chip specific */
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#define SH_FSI_OPTION_MASK 0x00000F00
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#define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */
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/* D: clock selecter if master mode */
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#define SH_FSI_CLK_MASK 0x0000F000
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#define SH_FSI_CLK_EXTERNAL (1 << 12)
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#define SH_FSI_CLK_CPG (2 << 12) /* FSIxCK + FSI-DIV */
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/*
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* set_rate return value
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*
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* see ACKMD/BPFMD on
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* ACK_MD (FSI2)
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* CKG1 (FSI)
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*
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* err : return value < 0
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* no change : return value == 0
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* change xMD : return value > 0
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*
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* 0x-00000AB
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*
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* A: ACKMD value
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* B: BPFMD value
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*/
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#define SH_FSI_ACKMD_MASK (0xF << 0)
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#define SH_FSI_ACKMD_512 (1 << 0)
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#define SH_FSI_ACKMD_256 (2 << 0)
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#define SH_FSI_ACKMD_128 (3 << 0)
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#define SH_FSI_ACKMD_64 (4 << 0)
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#define SH_FSI_ACKMD_32 (5 << 0)
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#define SH_FSI_BPFMD_MASK (0xF << 4)
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#define SH_FSI_BPFMD_512 (1 << 4)
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#define SH_FSI_BPFMD_256 (2 << 4)
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#define SH_FSI_BPFMD_128 (3 << 4)
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#define SH_FSI_BPFMD_64 (4 << 4)
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#define SH_FSI_BPFMD_32 (5 << 4)
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#define SH_FSI_BPFMD_16 (6 << 4)
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struct sh_fsi_port_info {
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unsigned long flags;
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int tx_id;
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int rx_id;
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int (*set_rate)(struct device *dev, int rate, int enable);
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};
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struct sh_fsi_platform_info {
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struct sh_fsi_port_info port_a;
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struct sh_fsi_port_info port_b;
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};
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#endif /* __SOUND_FSI_H */
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