b0c3130d69
In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better channel first. This patch introduces concept of channel allocation order in dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel allocation will follow, else channels will be allocated in descending order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> |
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| .. | ||
| ioat | ||
| ipu | ||
| ppc4xx | ||
| amba-pl08x.c | ||
| at_hdmac_regs.h | ||
| at_hdmac.c | ||
| coh901318_lli.c | ||
| coh901318_lli.h | ||
| coh901318.c | ||
| dmaengine.c | ||
| dmatest.c | ||
| dw_dmac_regs.h | ||
| dw_dmac.c | ||
| fsldma.c | ||
| fsldma.h | ||
| imx-dma.c | ||
| imx-sdma.c | ||
| intel_mid_dma_regs.h | ||
| intel_mid_dma.c | ||
| iop-adma.c | ||
| iovlock.c | ||
| Kconfig | ||
| Makefile | ||
| mpc512x_dma.c | ||
| mv_xor.c | ||
| mv_xor.h | ||
| mxs-dma.c | ||
| pch_dma.c | ||
| pl330.c | ||
| shdma.c | ||
| shdma.h | ||
| ste_dma40_ll.c | ||
| ste_dma40_ll.h | ||
| ste_dma40.c | ||
| timb_dma.c | ||
| txx9dmac.c | ||
| txx9dmac.h | ||