47ebe00b68
- Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdLKxYAAoJEHwUBw8lI4NHsH8P/AqYZpUlLthe5L4qItzM1Uf0 HqxsJYs0xworjSRml8uptx/TzjIgJnJfEk2PV5VA+0zJNz/HnH7lDH85wKDx1Ydl AatUuyAFRO3GZOup/hY0AEIPhoIMdg/3zS2aapjJmaEZCVK2eVKmcj0KMvO5g0cw tsmXm3O0xd2Na1ToslNyYgFfCn8ortuAeoKiXJxhivMbGjRfw4LW/RPgS17Vspvh mEuxNXFWAZ+DorgPF5BmDPZ+LXcGgCXGNIoj64W+VHaXU5yXnlky+6/0f7cEcFEd yl3hjXVwyAq5zIItIOmiuozZidi5yfoizXg4S2ZD3P4xXKZ5OZ9Gf/0SMyXUIErU pwGxo6ZgsBcEpAHtqySELQedttttID+jYYeWU6oDr2LOy3W3F7AHOEGg9l9ZllLh gRdIoz3PrMK1wy/9Ytl37xklZyBk+HJLkeoIAvjrNgNJ1YRKqcysUCwsmqO7SG3N HnIGx74sG8ChljT/yX5pElq3ip6qLdb4pJcsfxKJ9VSxsTZ3JNINGNQtvI19hKR/ 6sn/c1Rb5/S1WxINGr+2FxChxXF8OESCN6GIEu6mNYVBzQnNPzwgPxfAGCqdoOOH mqXXgYNePMaBGYXBkdgvP1CnqenRRmTYo/1L4QmI4Mve4xpd5zhx5cZt9FlQJ2Im /hVT8gZ6bIrutsVOy4rg =R+aC -----END PGP SIGNATURE----- Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: - Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback Documentation: dmaengine: clean up description of dmatest usage dmaengine: tegra210-adma: remove PM_CLK dependency dmaengine: fsl-edma: add i.mx7ulp edma2 version support dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma dmaengine: fsl-edma-common: version check for v2 instead dmaengine: fsl-edma-common: move dmamux register to another single function dmaengine: fsl-edma: add drvdata for fsl-edma dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" dmaengine: rcar-dmac: Reject zero-length slave DMA requests dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw-edma: fix semicolon.cocci warnings dmaengine: sh: usb-dmac: Use [] to denote a flexible array member dmaengine: dmatest: timeout value of -1 should specify infinite wait dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit dmaengine: fsl-edma: support little endian for edma driver dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" dmagengine: pl330: add code to get reset property dt-bindings: pl330: document the optional resets property ...
148 lines
3.6 KiB
C
148 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Virtual DMA channel support for DMAengine
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*
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* Copyright (C) 2012 Russell King
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*/
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include "virt-dma.h"
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static struct virt_dma_desc *to_virt_desc(struct dma_async_tx_descriptor *tx)
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{
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return container_of(tx, struct virt_dma_desc, tx);
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}
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dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx)
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{
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struct virt_dma_chan *vc = to_virt_chan(tx->chan);
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struct virt_dma_desc *vd = to_virt_desc(tx);
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unsigned long flags;
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dma_cookie_t cookie;
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spin_lock_irqsave(&vc->lock, flags);
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cookie = dma_cookie_assign(tx);
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list_move_tail(&vd->node, &vc->desc_submitted);
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spin_unlock_irqrestore(&vc->lock, flags);
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dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
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vc, vd, cookie);
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return cookie;
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}
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EXPORT_SYMBOL_GPL(vchan_tx_submit);
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/**
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* vchan_tx_desc_free - free a reusable descriptor
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* @tx: the transfer
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*
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* This function frees a previously allocated reusable descriptor. The only
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* other way is to clear the DMA_CTRL_REUSE flag and submit one last time the
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* transfer.
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*
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* Returns 0 upon success
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*/
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int vchan_tx_desc_free(struct dma_async_tx_descriptor *tx)
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{
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struct virt_dma_chan *vc = to_virt_chan(tx->chan);
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struct virt_dma_desc *vd = to_virt_desc(tx);
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unsigned long flags;
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spin_lock_irqsave(&vc->lock, flags);
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list_del(&vd->node);
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spin_unlock_irqrestore(&vc->lock, flags);
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dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: freeing\n",
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vc, vd, vd->tx.cookie);
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vc->desc_free(vd);
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return 0;
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}
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EXPORT_SYMBOL_GPL(vchan_tx_desc_free);
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struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *vc,
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dma_cookie_t cookie)
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{
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struct virt_dma_desc *vd;
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list_for_each_entry(vd, &vc->desc_issued, node)
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if (vd->tx.cookie == cookie)
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return vd;
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return NULL;
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}
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EXPORT_SYMBOL_GPL(vchan_find_desc);
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/*
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* This tasklet handles the completion of a DMA descriptor by
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* calling its callback and freeing it.
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*/
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static void vchan_complete(unsigned long arg)
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{
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struct virt_dma_chan *vc = (struct virt_dma_chan *)arg;
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struct virt_dma_desc *vd, *_vd;
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struct dmaengine_desc_callback cb;
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LIST_HEAD(head);
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spin_lock_irq(&vc->lock);
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list_splice_tail_init(&vc->desc_completed, &head);
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vd = vc->cyclic;
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if (vd) {
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vc->cyclic = NULL;
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dmaengine_desc_get_callback(&vd->tx, &cb);
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} else {
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memset(&cb, 0, sizeof(cb));
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}
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spin_unlock_irq(&vc->lock);
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dmaengine_desc_callback_invoke(&cb, &vd->tx_result);
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list_for_each_entry_safe(vd, _vd, &head, node) {
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dmaengine_desc_get_callback(&vd->tx, &cb);
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list_del(&vd->node);
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vchan_vdesc_fini(vd);
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dmaengine_desc_callback_invoke(&cb, &vd->tx_result);
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}
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}
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void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head)
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{
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struct virt_dma_desc *vd, *_vd;
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list_for_each_entry_safe(vd, _vd, head, node) {
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if (dmaengine_desc_test_reuse(&vd->tx)) {
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list_move_tail(&vd->node, &vc->desc_allocated);
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} else {
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dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
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list_del(&vd->node);
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vc->desc_free(vd);
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}
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}
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}
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EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
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void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev)
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{
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dma_cookie_init(&vc->chan);
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spin_lock_init(&vc->lock);
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INIT_LIST_HEAD(&vc->desc_allocated);
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INIT_LIST_HEAD(&vc->desc_submitted);
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INIT_LIST_HEAD(&vc->desc_issued);
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INIT_LIST_HEAD(&vc->desc_completed);
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tasklet_init(&vc->task, vchan_complete, (unsigned long)vc);
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vc->chan.device = dmadev;
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list_add_tail(&vc->chan.device_node, &dmadev->channels);
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}
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EXPORT_SYMBOL_GPL(vchan_init);
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MODULE_AUTHOR("Russell King");
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MODULE_LICENSE("GPL");
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