4a3ad2ddc0
Ran patches through scripts/Lindent (part 1). Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
36 lines
1.3 KiB
ArmAsm
36 lines
1.3 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2004-2008 Silicon Graphics, Inc. All Rights Reserved.
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*/
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/*
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* The xp_nofault_PIOR function takes a pointer to a remote PIO register
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* and attempts to load and consume a value from it. This function
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* will be registered as a nofault code block. In the event that the
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* PIO read fails, the MCA handler will force the error to look
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* corrected and vector to the xp_error_PIOR which will return an error.
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*
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* The definition of "consumption" and the time it takes for an MCA
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* to surface is processor implementation specific. This code
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* is sufficient on Itanium through the Montvale processor family.
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* It may need to be adjusted for future processor implementations.
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*
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* extern int xp_nofault_PIOR(void *remote_register);
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*/
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.global xp_nofault_PIOR
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xp_nofault_PIOR:
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mov r8=r0 // Stage a success return value
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ld8.acq r9=[r32];; // PIO Read the specified register
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adds r9=1,r9;; // Add to force consumption
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srlz.i;; // Allow time for MCA to surface
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br.ret.sptk.many b0;; // Return success
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.global xp_error_PIOR
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xp_error_PIOR:
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mov r8=1 // Return value of 1
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br.ret.sptk.many b0;; // Return failure
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