tmp_suning_uos_patched/arch/mips/sibyte/sb1250
Ralf Baechle d04533650f [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it.  In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
..
bus_watcher.c [MIPS] A few more pt_regs fixups. 2006-10-19 17:55:13 +01:00
irq.c [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. 2007-10-22 22:09:00 +01:00
Makefile [MIPS] Use -Werror on subdirectories which build cleanly. 2007-07-31 21:35:33 +01:00
prom.c [MIPS] checkfiles: Fix "need space after that ','" errors. 2007-10-11 23:46:15 +01:00
setup.c [MIPS] Sibyte: cleanup static inline forward declarations. 2007-10-11 23:46:05 +01:00
smp.c [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. 2007-10-22 22:09:00 +01:00
time.c [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. 2007-10-22 22:09:00 +01:00