e1035715ef
The new way does not require additional loop over vcpus to calculate the one with lowest priority as one is chosen during delivery bitmap construction. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
379 lines
9.8 KiB
C
379 lines
9.8 KiB
C
/*
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* irq_comm.c: Common API for in kernel interrupt controller
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* Copyright (c) 2007, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*
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*/
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#include <linux/kvm_host.h>
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#include <asm/msidef.h>
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#include "irq.h"
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#include "ioapic.h"
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static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int level)
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{
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#ifdef CONFIG_X86
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return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level);
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#else
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return -1;
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#endif
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}
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static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int level)
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{
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return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
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}
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void kvm_get_intr_delivery_bitmask(struct kvm *kvm, struct kvm_lapic *src,
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int dest_id, int dest_mode, bool low_prio, int short_hand,
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unsigned long *deliver_bitmask)
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{
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int i, lowest = -1;
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struct kvm_vcpu *vcpu;
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if (dest_mode == 0 && dest_id == 0xff && low_prio)
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printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
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bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
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for (i = 0; i < KVM_MAX_VCPUS; i++) {
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vcpu = kvm->vcpus[i];
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if (!vcpu || !kvm_apic_present(vcpu))
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continue;
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if (!kvm_apic_match_dest(vcpu, src, short_hand, dest_id,
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dest_mode))
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continue;
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if (!low_prio) {
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__set_bit(i, deliver_bitmask);
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} else {
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if (lowest < 0)
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lowest = i;
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if (kvm_apic_compare_prio(vcpu, kvm->vcpus[lowest]) < 0)
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lowest = i;
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}
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}
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if (lowest != -1)
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__set_bit(lowest, deliver_bitmask);
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}
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static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int level)
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{
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union kvm_ioapic_redirect_entry entry;
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entry.bits = 0;
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entry.fields.dest_id = (e->msi.address_lo &
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MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
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entry.fields.vector = (e->msi.data &
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MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
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entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
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(unsigned long *)&e->msi.address_lo);
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entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
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(unsigned long *)&e->msi.data);
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entry.fields.delivery_mode = test_bit(
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MSI_DATA_DELIVERY_MODE_SHIFT,
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(unsigned long *)&e->msi.data);
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/* TODO Deal with RH bit of MSI message address */
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return ioapic_deliver_entry(kvm, &entry);
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}
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/* This should be called with the kvm->lock mutex held
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* Return value:
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* < 0 Interrupt was ignored (masked or not delivered for other reasons)
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* = 0 Interrupt was coalesced (previous irq is still pending)
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* > 0 Number of CPUs interrupt was delivered to
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*/
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int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
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{
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struct kvm_kernel_irq_routing_entry *e;
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unsigned long *irq_state, sig_level;
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int ret = -1;
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if (irq < KVM_IOAPIC_NUM_PINS) {
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irq_state = (unsigned long *)&kvm->arch.irq_states[irq];
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/* Logical OR for level trig interrupt */
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if (level)
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set_bit(irq_source_id, irq_state);
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else
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clear_bit(irq_source_id, irq_state);
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sig_level = !!(*irq_state);
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} else /* Deal with MSI/MSI-X */
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sig_level = 1;
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/* Not possible to detect if the guest uses the PIC or the
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* IOAPIC. So set the bit in both. The guest will ignore
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* writes to the unused one.
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*/
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list_for_each_entry(e, &kvm->irq_routing, link)
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if (e->gsi == irq) {
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int r = e->set(e, kvm, sig_level);
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if (r < 0)
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continue;
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ret = r + ((ret < 0) ? 0 : ret);
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}
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return ret;
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}
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void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
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{
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struct kvm_kernel_irq_routing_entry *e;
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struct kvm_irq_ack_notifier *kian;
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struct hlist_node *n;
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unsigned gsi = pin;
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list_for_each_entry(e, &kvm->irq_routing, link)
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if (e->irqchip.irqchip == irqchip &&
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e->irqchip.pin == pin) {
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gsi = e->gsi;
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break;
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}
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hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
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if (kian->gsi == gsi)
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kian->irq_acked(kian);
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}
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void kvm_register_irq_ack_notifier(struct kvm *kvm,
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struct kvm_irq_ack_notifier *kian)
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{
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hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
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}
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void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian)
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{
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hlist_del_init(&kian->link);
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}
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/* The caller must hold kvm->lock mutex */
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int kvm_request_irq_source_id(struct kvm *kvm)
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{
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unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
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int irq_source_id = find_first_zero_bit(bitmap,
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sizeof(kvm->arch.irq_sources_bitmap));
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if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
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printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
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return -EFAULT;
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}
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ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
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set_bit(irq_source_id, bitmap);
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return irq_source_id;
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}
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void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
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{
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int i;
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ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
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if (irq_source_id < 0 ||
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irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
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printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
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return;
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}
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for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
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clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
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clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
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}
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void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
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struct kvm_irq_mask_notifier *kimn)
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{
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kimn->irq = irq;
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hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
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}
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void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
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struct kvm_irq_mask_notifier *kimn)
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{
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hlist_del(&kimn->link);
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}
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void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
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{
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struct kvm_irq_mask_notifier *kimn;
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struct hlist_node *n;
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hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
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if (kimn->irq == irq)
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kimn->func(kimn, mask);
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}
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static void __kvm_free_irq_routing(struct list_head *irq_routing)
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{
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struct kvm_kernel_irq_routing_entry *e, *n;
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list_for_each_entry_safe(e, n, irq_routing, link)
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kfree(e);
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}
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void kvm_free_irq_routing(struct kvm *kvm)
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{
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__kvm_free_irq_routing(&kvm->irq_routing);
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}
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static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
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const struct kvm_irq_routing_entry *ue)
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{
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int r = -EINVAL;
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int delta;
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e->gsi = ue->gsi;
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switch (ue->type) {
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case KVM_IRQ_ROUTING_IRQCHIP:
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delta = 0;
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switch (ue->u.irqchip.irqchip) {
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case KVM_IRQCHIP_PIC_MASTER:
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e->set = kvm_set_pic_irq;
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break;
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case KVM_IRQCHIP_PIC_SLAVE:
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e->set = kvm_set_pic_irq;
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delta = 8;
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break;
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case KVM_IRQCHIP_IOAPIC:
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e->set = kvm_set_ioapic_irq;
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break;
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default:
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goto out;
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}
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e->irqchip.irqchip = ue->u.irqchip.irqchip;
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e->irqchip.pin = ue->u.irqchip.pin + delta;
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break;
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case KVM_IRQ_ROUTING_MSI:
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e->set = kvm_set_msi;
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e->msi.address_lo = ue->u.msi.address_lo;
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e->msi.address_hi = ue->u.msi.address_hi;
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e->msi.data = ue->u.msi.data;
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break;
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default:
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goto out;
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}
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r = 0;
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out:
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return r;
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}
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int kvm_set_irq_routing(struct kvm *kvm,
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const struct kvm_irq_routing_entry *ue,
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unsigned nr,
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unsigned flags)
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{
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struct list_head irq_list = LIST_HEAD_INIT(irq_list);
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struct list_head tmp = LIST_HEAD_INIT(tmp);
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struct kvm_kernel_irq_routing_entry *e = NULL;
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unsigned i;
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int r;
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for (i = 0; i < nr; ++i) {
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r = -EINVAL;
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if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
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goto out;
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if (ue->flags)
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goto out;
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r = -ENOMEM;
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e = kzalloc(sizeof(*e), GFP_KERNEL);
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if (!e)
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goto out;
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r = setup_routing_entry(e, ue);
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if (r)
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goto out;
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++ue;
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list_add(&e->link, &irq_list);
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e = NULL;
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}
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mutex_lock(&kvm->lock);
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list_splice(&kvm->irq_routing, &tmp);
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INIT_LIST_HEAD(&kvm->irq_routing);
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list_splice(&irq_list, &kvm->irq_routing);
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INIT_LIST_HEAD(&irq_list);
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list_splice(&tmp, &irq_list);
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mutex_unlock(&kvm->lock);
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r = 0;
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out:
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kfree(e);
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__kvm_free_irq_routing(&irq_list);
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return r;
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}
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#define IOAPIC_ROUTING_ENTRY(irq) \
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{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
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.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
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#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
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#ifdef CONFIG_X86
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# define PIC_ROUTING_ENTRY(irq) \
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{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
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.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
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# define ROUTING_ENTRY2(irq) \
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IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
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#else
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# define ROUTING_ENTRY2(irq) \
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IOAPIC_ROUTING_ENTRY(irq)
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#endif
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static const struct kvm_irq_routing_entry default_routing[] = {
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ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
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ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
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ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
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ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
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ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
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ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
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ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
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ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
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ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
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ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
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ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
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ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
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#ifdef CONFIG_IA64
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ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
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ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
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ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
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ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
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ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
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ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
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ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
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ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
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ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
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ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
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ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
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ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
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#endif
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};
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int kvm_setup_default_irq_routing(struct kvm *kvm)
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{
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return kvm_set_irq_routing(kvm, default_routing,
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ARRAY_SIZE(default_routing), 0);
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}
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