e7b946e98a
Currently move_native_irq disables and renables the irq we are migrating to ensure we don't take that irq when we are actually doing the migration operation. Disabling the irq needs to happen but sometimes doing the work is move_native_irq is too late. On x86 with ioapics the irq move sequences needs to be: edge_triggered: mask irq. move irq. unmask irq. ack irq. level_triggered: mask irq. ack irq. move irq. unmask irq. We can easily perform the edge triggered sequence, with the current defintion of move_native_irq. However the level triggered case does not map well. For that I have added move_masked_irq, to allow me to disable the irqs around both the ack and the move. Q: Why have we not seen this problem earlier? A: The only symptom I have been able to reproduce is that if we change the vector before acknowleding an irq the wrong irq is acknowledged. Since we currently are not reprogramming the irq vector during migration no problems show up. We have to mask the irq before we acknowledge the irq or else we could hit a window where an irq is asserted just before we acknowledge it. Edge triggered irqs do not have this problem because acknowledgements do not propogate in the same way. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
423 lines
12 KiB
C
423 lines
12 KiB
C
#ifndef _LINUX_IRQ_H
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#define _LINUX_IRQ_H
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/*
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* Please do not include this file in generic code. There is currently
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* no requirement for any architecture to implement anything held
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* within this file.
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*
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* Thanks. --rmk
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*/
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#include <linux/smp.h>
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#ifndef CONFIG_S390
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#include <linux/linkage.h>
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/cpumask.h>
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#include <linux/irqreturn.h>
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#include <asm/irq.h>
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#include <asm/ptrace.h>
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/*
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* IRQ line status.
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*
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* Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
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*
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* IRQ types
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*/
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#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
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#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
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#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
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#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
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#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
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#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
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#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
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#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
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/* Internal flags */
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#define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */
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#define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */
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#define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */
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#define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */
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#define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */
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#define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */
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#define IRQ_LEVEL 0x00400000 /* IRQ level triggered */
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#define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */
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#define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */
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#ifdef CONFIG_IRQ_PER_CPU
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# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
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#else
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# define CHECK_IRQ_PER_CPU(var) 0
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#endif
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#define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */
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#define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */
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#define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
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#define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
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#define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */
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#define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */
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struct proc_dir_entry;
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/**
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* struct irq_chip - hardware interrupt chip descriptor
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*
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* @name: name for /proc/interrupts
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* @startup: start up the interrupt (defaults to ->enable if NULL)
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* @shutdown: shut down the interrupt (defaults to ->disable if NULL)
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* @enable: enable the interrupt (defaults to chip->unmask if NULL)
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* @disable: disable the interrupt (defaults to chip->mask if NULL)
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* @ack: start of a new interrupt
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* @mask: mask an interrupt source
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* @mask_ack: ack and mask an interrupt source
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* @unmask: unmask an interrupt source
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* @eoi: end of interrupt - chip level
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* @end: end of interrupt - flow level
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* @set_affinity: set the CPU affinity on SMP machines
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* @retrigger: resend an IRQ to the CPU
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* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
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* @set_wake: enable/disable power-management wake-on of an IRQ
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*
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* @release: release function solely used by UML
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* @typename: obsoleted by name, kept as migration helper
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*/
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struct irq_chip {
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const char *name;
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unsigned int (*startup)(unsigned int irq);
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void (*shutdown)(unsigned int irq);
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void (*enable)(unsigned int irq);
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void (*disable)(unsigned int irq);
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void (*ack)(unsigned int irq);
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void (*mask)(unsigned int irq);
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void (*mask_ack)(unsigned int irq);
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void (*unmask)(unsigned int irq);
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void (*eoi)(unsigned int irq);
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void (*end)(unsigned int irq);
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void (*set_affinity)(unsigned int irq, cpumask_t dest);
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int (*retrigger)(unsigned int irq);
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int (*set_type)(unsigned int irq, unsigned int flow_type);
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int (*set_wake)(unsigned int irq, unsigned int on);
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/* Currently used only by UML, might disappear one day.*/
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#ifdef CONFIG_IRQ_RELEASE_METHOD
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void (*release)(unsigned int irq, void *dev_id);
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#endif
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/*
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* For compatibility, ->typename is copied into ->name.
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* Will disappear.
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*/
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const char *typename;
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};
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/**
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* struct irq_desc - interrupt descriptor
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*
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* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
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* @chip: low level interrupt hardware access
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* @handler_data: per-IRQ data for the irq_chip methods
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* @chip_data: platform-specific per-chip private data for the chip
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* methods, to allow shared chip implementations
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* @action: the irq action chain
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* @status: status information
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* @depth: disable-depth, for nested irq_disable() calls
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* @wake_depth: enable depth, for multiple set_irq_wake() callers
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* @irq_count: stats field to detect stalled irqs
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* @irqs_unhandled: stats field for spurious unhandled interrupts
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* @lock: locking for SMP
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* @affinity: IRQ affinity on SMP
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* @cpu: cpu index useful for balancing
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* @pending_mask: pending rebalanced interrupts
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* @dir: /proc/irq/ procfs entry
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* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
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*
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* Pad this out to 32 bytes for cache and indexing reasons.
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*/
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struct irq_desc {
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void fastcall (*handle_irq)(unsigned int irq,
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struct irq_desc *desc,
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struct pt_regs *regs);
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struct irq_chip *chip;
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void *handler_data;
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void *chip_data;
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struct irqaction *action; /* IRQ action list */
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unsigned int status; /* IRQ status */
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unsigned int depth; /* nested irq disables */
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unsigned int wake_depth; /* nested wake enables */
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unsigned int irq_count; /* For detecting broken IRQs */
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unsigned int irqs_unhandled;
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spinlock_t lock;
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#ifdef CONFIG_SMP
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cpumask_t affinity;
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unsigned int cpu;
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#endif
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#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
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cpumask_t pending_mask;
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#endif
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#ifdef CONFIG_PROC_FS
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struct proc_dir_entry *dir;
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#endif
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} ____cacheline_aligned;
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extern struct irq_desc irq_desc[NR_IRQS];
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/*
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* Migration helpers for obsolete names, they will go away:
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*/
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#define hw_interrupt_type irq_chip
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typedef struct irq_chip hw_irq_controller;
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#define no_irq_type no_irq_chip
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typedef struct irq_desc irq_desc_t;
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/*
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* Pick up the arch-dependent methods:
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*/
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#include <asm/hw_irq.h>
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extern int setup_irq(unsigned int irq, struct irqaction *new);
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#ifdef CONFIG_GENERIC_HARDIRQS
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#ifndef handle_dynamic_tick
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# define handle_dynamic_tick(a) do { } while (0)
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#endif
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#ifdef CONFIG_SMP
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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irq_desc[irq].affinity = mask;
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}
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#else
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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}
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#endif
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#ifdef CONFIG_SMP
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#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
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void set_pending_irq(unsigned int irq, cpumask_t mask);
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void move_native_irq(int irq);
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void move_masked_irq(int irq);
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#ifdef CONFIG_PCI_MSI
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/*
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* Wonder why these are dummies?
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* For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
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* counter part after translating the vector to irq info. We need to perform
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* this operation on the real irq, when we dont use vector, i.e when
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* pci_use_vector() is false.
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*/
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static inline void move_irq(int irq)
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{
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}
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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}
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#else /* CONFIG_PCI_MSI */
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static inline void move_irq(int irq)
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{
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move_native_irq(irq);
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}
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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set_native_irq_info(irq, mask);
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}
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#endif /* CONFIG_PCI_MSI */
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#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
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static inline void move_irq(int irq)
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{
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}
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static inline void move_native_irq(int irq)
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{
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}
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static inline void move_masked_irq(int irq)
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{
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}
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static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
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{
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}
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static inline void set_irq_info(int irq, cpumask_t mask)
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{
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set_native_irq_info(irq, mask);
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}
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#endif /* CONFIG_GENERIC_PENDING_IRQ */
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#else /* CONFIG_SMP */
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#define move_irq(x)
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#define move_native_irq(x)
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#define move_masked_irq(x)
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_IRQBALANCE
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extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
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#else
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static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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}
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#endif
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#ifdef CONFIG_AUTO_IRQ_AFFINITY
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extern int select_smp_affinity(unsigned int irq);
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#else
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static inline int select_smp_affinity(unsigned int irq)
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{
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return 1;
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}
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#endif
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extern int no_irq_affinity;
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/* Handle irq action chains: */
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extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
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struct irqaction *action);
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/*
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* Built-in IRQ handlers for various IRQ types,
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* callable via desc->chip->handle_irq()
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*/
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extern void fastcall
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handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
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extern void fastcall
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handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs);
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extern void fastcall
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handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
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extern void fastcall
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handle_simple_irq(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs);
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extern void fastcall
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handle_percpu_irq(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs);
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extern void fastcall
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handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
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/*
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* Get a descriptive string for the highlevel handler, for
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* /proc/interrupts output:
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*/
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extern const char *
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handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
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struct pt_regs *));
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/*
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* Monolithic do_IRQ implementation.
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* (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
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*/
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#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
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extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
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#endif
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/*
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* Architectures call this to let the generic IRQ layer
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* handle an interrupt. If the descriptor is attached to an
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* irqchip-style controller then we call the ->handle_irq() handler,
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* and it calls __do_IRQ() if it's attached to an irqtype-style controller.
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*/
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static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs)
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{
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struct irq_desc *desc = irq_desc + irq;
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#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
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desc->handle_irq(irq, desc, regs);
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#else
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if (likely(desc->handle_irq))
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desc->handle_irq(irq, desc, regs);
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else
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__do_IRQ(irq, regs);
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#endif
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}
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/* Handling of unhandled and spurious interrupts: */
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extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
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int action_ret, struct pt_regs *regs);
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/* Resending of interrupts :*/
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void check_irq_resend(struct irq_desc *desc, unsigned int irq);
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/* Initialize /proc/irq/ */
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extern void init_irq_proc(void);
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/* Enable/disable irq debugging output: */
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extern int noirqdebug_setup(char *str);
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/* Checks whether the interrupt can be requested by request_irq(): */
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extern int can_request_irq(unsigned int irq, unsigned long irqflags);
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/* Dummy irq-chip implementations: */
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extern struct irq_chip no_irq_chip;
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extern struct irq_chip dummy_irq_chip;
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extern void
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set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
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void fastcall (*handle)(unsigned int,
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struct irq_desc *,
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struct pt_regs *));
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extern void
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__set_irq_handler(unsigned int irq,
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void fastcall (*handle)(unsigned int, struct irq_desc *,
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struct pt_regs *),
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int is_chained);
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/*
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* Set a highlevel flow handler for a given IRQ:
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*/
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static inline void
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set_irq_handler(unsigned int irq,
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void fastcall (*handle)(unsigned int, struct irq_desc *,
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struct pt_regs *))
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{
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__set_irq_handler(irq, handle, 0);
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}
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/*
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* Set a highlevel chained flow handler for a given IRQ.
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* (a chained handler is automatically enabled and set to
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* IRQ_NOREQUEST and IRQ_NOPROBE)
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*/
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static inline void
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set_irq_chained_handler(unsigned int irq,
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void fastcall (*handle)(unsigned int, struct irq_desc *,
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struct pt_regs *))
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{
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__set_irq_handler(irq, handle, 1);
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}
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/* Set/get chip/data for an IRQ: */
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extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
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extern int set_irq_data(unsigned int irq, void *data);
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extern int set_irq_chip_data(unsigned int irq, void *data);
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extern int set_irq_type(unsigned int irq, unsigned int type);
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#define get_irq_chip(irq) (irq_desc[irq].chip)
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#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
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#define get_irq_data(irq) (irq_desc[irq].handler_data)
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#endif /* CONFIG_GENERIC_HARDIRQS */
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#endif /* !CONFIG_S390 */
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#endif /* _LINUX_IRQ_H */
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