e95d9c6b04
Commit 238e4f142c ("ide: add
IDE_HFLAG_NO_LBA48 and IDE_HFLAG_NO_LBA48_DMA host flags") caused a
regression because the host_flags in struct hwif_s wasn't expanded to
cope with the fact that the host flags no longer fit in 16 bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
[ I hate having to add good commit descriptions. - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1429 lines
44 KiB
C
1429 lines
44 KiB
C
#ifndef _IDE_H
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#define _IDE_H
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/*
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* linux/include/linux/ide.h
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*
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* Copyright (C) 1994-2002 Linus Torvalds & authors
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/hdreg.h>
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#include <linux/hdsmart.h>
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#include <linux/blkdev.h>
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#include <linux/proc_fs.h>
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#include <linux/interrupt.h>
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#include <linux/bitops.h>
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#include <linux/bio.h>
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#include <linux/device.h>
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#include <linux/pci.h>
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#include <linux/completion.h>
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#ifdef CONFIG_BLK_DEV_IDEACPI
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#include <acpi/acpi.h>
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#endif
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#include <asm/byteorder.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/semaphore.h>
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#include <asm/mutex.h>
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/******************************************************************************
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* IDE driver configuration options (play with these as desired):
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*
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* REALLY_SLOW_IO can be defined in ide.c and ide-cd.c, if necessary
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*/
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#define INITIAL_MULT_COUNT 0 /* off=0; on=2,4,8,16,32, etc.. */
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#ifndef SUPPORT_SLOW_DATA_PORTS /* 1 to support slow data ports */
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#define SUPPORT_SLOW_DATA_PORTS 1 /* 0 to reduce kernel size */
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#endif
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#ifndef SUPPORT_VLB_SYNC /* 1 to support weird 32-bit chips */
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#define SUPPORT_VLB_SYNC 1 /* 0 to reduce kernel size */
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#endif
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#ifndef OK_TO_RESET_CONTROLLER /* 1 needed for good error recovery */
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#define OK_TO_RESET_CONTROLLER 1 /* 0 for use with AH2372A/B interface */
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#endif
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#ifndef DISABLE_IRQ_NOSYNC
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#define DISABLE_IRQ_NOSYNC 0
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#endif
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/*
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* Used to indicate "no IRQ", should be a value that cannot be an IRQ
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* number.
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*/
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#define IDE_NO_IRQ (-1)
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/*
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* "No user-serviceable parts" beyond this point :)
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*****************************************************************************/
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typedef unsigned char byte; /* used everywhere */
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/*
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* Probably not wise to fiddle with these
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*/
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#define ERROR_MAX 8 /* Max read/write errors per sector */
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#define ERROR_RESET 3 /* Reset controller every 4th retry */
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#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
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/*
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* Tune flags
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*/
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#define IDE_TUNE_NOAUTO 2
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#define IDE_TUNE_AUTO 1
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#define IDE_TUNE_DEFAULT 0
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/*
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* state flags
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*/
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#define DMA_PIO_RETRY 1 /* retrying in PIO */
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#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
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#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
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/*
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* Definitions for accessing IDE controller registers
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*/
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#define IDE_NR_PORTS (10)
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#define IDE_DATA_OFFSET (0)
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#define IDE_ERROR_OFFSET (1)
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#define IDE_NSECTOR_OFFSET (2)
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#define IDE_SECTOR_OFFSET (3)
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#define IDE_LCYL_OFFSET (4)
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#define IDE_HCYL_OFFSET (5)
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#define IDE_SELECT_OFFSET (6)
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#define IDE_STATUS_OFFSET (7)
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#define IDE_CONTROL_OFFSET (8)
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#define IDE_IRQ_OFFSET (9)
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#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
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#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
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#define IDE_CONTROL_OFFSET_HOB (7)
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#define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
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#define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
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#define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
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#define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
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#define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
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#define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
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#define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
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#define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
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#define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
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#define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
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#define IDE_FEATURE_REG IDE_ERROR_REG
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#define IDE_COMMAND_REG IDE_STATUS_REG
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#define IDE_ALTSTATUS_REG IDE_CONTROL_REG
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#define IDE_IREASON_REG IDE_NSECTOR_REG
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#define IDE_BCOUNTL_REG IDE_LCYL_REG
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#define IDE_BCOUNTH_REG IDE_HCYL_REG
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#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
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#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
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#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
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#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
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#define DRIVE_READY (READY_STAT | SEEK_STAT)
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#define DATA_READY (DRQ_STAT)
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#define BAD_CRC (ABRT_ERR | ICRC_ERR)
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#define SATA_NR_PORTS (3) /* 16 possible ?? */
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#define SATA_STATUS_OFFSET (0)
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#define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
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#define SATA_ERROR_OFFSET (1)
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#define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
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#define SATA_CONTROL_OFFSET (2)
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#define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
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#define SATA_MISC_OFFSET (0)
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#define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
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#define SATA_PHY_OFFSET (1)
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#define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
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#define SATA_IEN_OFFSET (2)
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#define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
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/*
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* Our Physical Region Descriptor (PRD) table should be large enough
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* to handle the biggest I/O request we are likely to see. Since requests
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* can have no more than 256 sectors, and since the typical blocksize is
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* two or more sectors, we could get by with a limit of 128 entries here for
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* the usual worst case. Most requests seem to include some contiguous blocks,
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* further reducing the number of table entries required.
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*
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* The driver reverts to PIO mode for individual requests that exceed
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* this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
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* 100% of all crazy scenarios here is not necessary.
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*
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* As it turns out though, we must allocate a full 4KB page for this,
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* so the two PRD tables (ide0 & ide1) will each get half of that,
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* allowing each to have about 256 entries (8 bytes each) from this.
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*/
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#define PRD_BYTES 8
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#define PRD_ENTRIES 256
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/*
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* Some more useful definitions
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*/
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#define PARTN_BITS 6 /* number of minor dev bits for partitions */
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#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
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#define SECTOR_SIZE 512
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#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
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#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
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/*
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* Timeouts for various operations:
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*/
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#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
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#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
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#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
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#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
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#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
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#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
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/*
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* Check for an interrupt and acknowledge the interrupt status
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*/
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struct hwif_s;
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typedef int (ide_ack_intr_t)(struct hwif_s *);
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/*
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* hwif_chipset_t is used to keep track of the specific hardware
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* chipset used by each IDE interface, if known.
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*/
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enum { ide_unknown, ide_generic, ide_pci,
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ide_cmd640, ide_dtc2278, ide_ali14xx,
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ide_qd65xx, ide_umc8672, ide_ht6560b,
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ide_rz1000, ide_trm290,
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ide_cmd646, ide_cy82c693, ide_4drives,
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ide_pmac, ide_etrax100, ide_acorn,
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ide_au1xxx, ide_forced
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};
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typedef u8 hwif_chipset_t;
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/*
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* Structure to hold all information about the location of this port
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*/
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typedef struct hw_regs_s {
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unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
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int irq; /* our irq number */
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ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
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hwif_chipset_t chipset;
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struct device *dev;
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} hw_regs_t;
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struct hwif_s * ide_find_port(unsigned long);
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int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
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struct hwif_s **);
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void ide_setup_ports( hw_regs_t *hw,
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unsigned long base,
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int *offsets,
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unsigned long ctrl,
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unsigned long intr,
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ide_ack_intr_t *ack_intr,
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#if 0
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ide_io_ops_t *iops,
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#endif
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int irq);
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static inline void ide_std_init_ports(hw_regs_t *hw,
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unsigned long io_addr,
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unsigned long ctl_addr)
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{
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unsigned int i;
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for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
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hw->io_ports[i] = io_addr++;
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hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
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}
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#include <asm/ide.h>
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#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
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#undef MAX_HWIFS
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#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
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#endif
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/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
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#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
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# define ide_default_io_base(index) (0)
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# define ide_default_irq(base) (0)
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# define ide_init_default_irq(base) (0)
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#endif
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#ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
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static inline void ide_init_hwif_ports(hw_regs_t *hw,
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unsigned long io_addr,
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unsigned long ctl_addr,
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int *irq)
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{
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if (!ctl_addr)
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ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
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else
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ide_std_init_ports(hw, io_addr, ctl_addr);
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if (irq)
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*irq = 0;
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hw->io_ports[IDE_IRQ_OFFSET] = 0;
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#ifdef CONFIG_PPC32
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if (ppc_ide_md.ide_init_hwif)
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ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
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#endif
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}
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#else
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static inline void ide_init_hwif_ports(hw_regs_t *hw,
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unsigned long io_addr,
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unsigned long ctl_addr,
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int *irq)
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{
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if (io_addr || ctl_addr)
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printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
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}
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#endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
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/* Currently only m68k, apus and m8xx need it */
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#ifndef IDE_ARCH_ACK_INTR
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# define ide_ack_intr(hwif) (1)
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#endif
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/* Currently only Atari needs it */
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#ifndef IDE_ARCH_LOCK
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# define ide_release_lock() do {} while (0)
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# define ide_get_lock(hdlr, data) do {} while (0)
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#endif /* IDE_ARCH_LOCK */
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/*
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* Now for the data we need to maintain per-drive: ide_drive_t
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*/
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#define ide_scsi 0x21
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#define ide_disk 0x20
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#define ide_optical 0x7
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#define ide_cdrom 0x5
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#define ide_tape 0x1
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#define ide_floppy 0x0
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/*
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* Special Driver Flags
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*
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* set_geometry : respecify drive geometry
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* recalibrate : seek to cyl 0
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* set_multmode : set multmode count
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* set_tune : tune interface for drive
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* serviced : service command
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* reserved : unused
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*/
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typedef union {
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unsigned all : 8;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned set_geometry : 1;
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unsigned recalibrate : 1;
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unsigned set_multmode : 1;
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unsigned set_tune : 1;
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unsigned serviced : 1;
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unsigned reserved : 3;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned reserved : 3;
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unsigned serviced : 1;
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unsigned set_tune : 1;
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unsigned set_multmode : 1;
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unsigned recalibrate : 1;
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unsigned set_geometry : 1;
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
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} b;
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} special_t;
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/*
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* ATA DATA Register Special.
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* ATA NSECTOR Count Register().
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* ATAPI Byte Count Register.
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*/
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typedef union {
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unsigned all :16;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned low :8; /* LSB */
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unsigned high :8; /* MSB */
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned high :8; /* MSB */
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unsigned low :8; /* LSB */
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
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} b;
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} ata_nsector_t, ata_data_t, atapi_bcount_t;
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/*
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* ATA-IDE Select Register, aka Device-Head
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*
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* head : always zeros here
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* unit : drive select number: 0/1
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* bit5 : always 1
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* lba : using LBA instead of CHS
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* bit7 : always 1
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*/
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typedef union {
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unsigned all : 8;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned head : 4;
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unsigned unit : 1;
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unsigned bit5 : 1;
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unsigned lba : 1;
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unsigned bit7 : 1;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned bit7 : 1;
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unsigned lba : 1;
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unsigned bit5 : 1;
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unsigned unit : 1;
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unsigned head : 4;
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
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} b;
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} select_t, ata_select_t;
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/*
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* The ATA-IDE Status Register.
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* The ATAPI Status Register.
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*
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* check : Error occurred
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* idx : Index Error
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* corr : Correctable error occurred
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* drq : Data is request by the device
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* dsc : Disk Seek Complete : ata
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* : Media access command finished : atapi
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* df : Device Fault : ata
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* : Reserved : atapi
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* drdy : Ready, Command Mode Capable : ata
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* : Ignored for ATAPI commands : atapi
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* bsy : Disk is Busy
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* : The device has access to the command block
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*/
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typedef union {
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unsigned all :8;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned check :1;
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unsigned idx :1;
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unsigned corr :1;
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unsigned drq :1;
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unsigned dsc :1;
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unsigned df :1;
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unsigned drdy :1;
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unsigned bsy :1;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned bsy :1;
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unsigned drdy :1;
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unsigned df :1;
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unsigned dsc :1;
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unsigned drq :1;
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unsigned corr :1;
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unsigned idx :1;
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unsigned check :1;
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
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} b;
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} ata_status_t, atapi_status_t;
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/*
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* ATAPI Feature Register
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*
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* dma : Using DMA or PIO
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* reserved321 : Reserved
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* reserved654 : Reserved (Tag Type)
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* reserved7 : Reserved
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*/
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typedef union {
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unsigned all :8;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned dma :1;
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unsigned reserved321 :3;
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unsigned reserved654 :3;
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unsigned reserved7 :1;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned reserved7 :1;
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unsigned reserved654 :3;
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unsigned reserved321 :3;
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unsigned dma :1;
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
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} b;
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} atapi_feature_t;
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/*
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* ATAPI Interrupt Reason Register.
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*
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* cod : Information transferred is command (1) or data (0)
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* io : The device requests us to read (1) or write (0)
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* reserved : Reserved
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*/
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typedef union {
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unsigned all :8;
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struct {
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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unsigned cod :1;
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unsigned io :1;
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unsigned reserved :6;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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unsigned reserved :6;
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unsigned io :1;
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unsigned cod :1;
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#else
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#error "Please fix <asm/byteorder.h>"
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#endif
|
|
} b;
|
|
} atapi_ireason_t;
|
|
|
|
/*
|
|
* The ATAPI error register.
|
|
*
|
|
* ili : Illegal Length Indication
|
|
* eom : End Of Media Detected
|
|
* abrt : Aborted command - As defined by ATA
|
|
* mcr : Media Change Requested - As defined by ATA
|
|
* sense_key : Sense key of the last failed packet command
|
|
*/
|
|
typedef union {
|
|
unsigned all :8;
|
|
struct {
|
|
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
|
unsigned ili :1;
|
|
unsigned eom :1;
|
|
unsigned abrt :1;
|
|
unsigned mcr :1;
|
|
unsigned sense_key :4;
|
|
#elif defined(__BIG_ENDIAN_BITFIELD)
|
|
unsigned sense_key :4;
|
|
unsigned mcr :1;
|
|
unsigned abrt :1;
|
|
unsigned eom :1;
|
|
unsigned ili :1;
|
|
#else
|
|
#error "Please fix <asm/byteorder.h>"
|
|
#endif
|
|
} b;
|
|
} atapi_error_t;
|
|
|
|
/*
|
|
* Status returned from various ide_ functions
|
|
*/
|
|
typedef enum {
|
|
ide_stopped, /* no drive operation was started */
|
|
ide_started, /* a drive operation was started, handler was set */
|
|
} ide_startstop_t;
|
|
|
|
struct ide_driver_s;
|
|
struct ide_settings_s;
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEACPI
|
|
struct ide_acpi_drive_link;
|
|
struct ide_acpi_hwif_link;
|
|
#endif
|
|
|
|
typedef struct ide_drive_s {
|
|
char name[4]; /* drive name, such as "hda" */
|
|
char driver_req[10]; /* requests specific driver */
|
|
|
|
struct request_queue *queue; /* request queue */
|
|
|
|
struct request *rq; /* current request */
|
|
struct ide_drive_s *next; /* circular list of hwgroup drives */
|
|
void *driver_data; /* extra driver data */
|
|
struct hd_driveid *id; /* drive model identification info */
|
|
#ifdef CONFIG_IDE_PROC_FS
|
|
struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
|
|
struct ide_settings_s *settings;/* /proc/ide/ drive settings */
|
|
#endif
|
|
struct hwif_s *hwif; /* actually (ide_hwif_t *) */
|
|
|
|
unsigned long sleep; /* sleep until this time */
|
|
unsigned long service_start; /* time we started last request */
|
|
unsigned long service_time; /* service time of last request */
|
|
unsigned long timeout; /* max time to wait for irq */
|
|
|
|
special_t special; /* special action flags */
|
|
select_t select; /* basic drive/head select reg value */
|
|
|
|
u8 keep_settings; /* restore settings after drive reset */
|
|
u8 using_dma; /* disk is using dma for read/write */
|
|
u8 retry_pio; /* retrying dma capable host in pio */
|
|
u8 state; /* retry state */
|
|
u8 waiting_for_dma; /* dma currently in progress */
|
|
u8 unmask; /* okay to unmask other irqs */
|
|
u8 bswap; /* byte swap data */
|
|
u8 noflush; /* don't attempt flushes */
|
|
u8 dsc_overlap; /* DSC overlap */
|
|
u8 nice1; /* give potential excess bandwidth */
|
|
|
|
unsigned present : 1; /* drive is physically present */
|
|
unsigned dead : 1; /* device ejected hint */
|
|
unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
|
|
unsigned noprobe : 1; /* from: hdx=noprobe */
|
|
unsigned removable : 1; /* 1 if need to do check_media_change */
|
|
unsigned attach : 1; /* needed for removable devices */
|
|
unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
|
|
unsigned no_unmask : 1; /* disallow setting unmask bit */
|
|
unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
|
|
unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
|
|
unsigned nice0 : 1; /* give obvious excess bandwidth */
|
|
unsigned nice2 : 1; /* give a share in our own bandwidth */
|
|
unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
|
|
unsigned nodma : 1; /* disallow DMA */
|
|
unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
|
|
unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
|
|
unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
|
|
unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
|
|
unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
|
|
unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
|
|
unsigned post_reset : 1;
|
|
unsigned udma33_warned : 1;
|
|
|
|
u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
|
|
u8 quirk_list; /* considered quirky, set for a specific host */
|
|
u8 init_speed; /* transfer rate set at boot */
|
|
u8 current_speed; /* current transfer rate set */
|
|
u8 desired_speed; /* desired transfer rate set */
|
|
u8 dn; /* now wide spread use */
|
|
u8 wcache; /* status of write cache */
|
|
u8 acoustic; /* acoustic management */
|
|
u8 media; /* disk, cdrom, tape, floppy, ... */
|
|
u8 ctl; /* "normal" value for IDE_CONTROL_REG */
|
|
u8 ready_stat; /* min status value for drive ready */
|
|
u8 mult_count; /* current multiple sector setting */
|
|
u8 mult_req; /* requested multiple sector setting */
|
|
u8 tune_req; /* requested drive tuning setting */
|
|
u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
|
|
u8 bad_wstat; /* used for ignoring WRERR_STAT */
|
|
u8 nowerr; /* used for ignoring WRERR_STAT */
|
|
u8 sect0; /* offset of first sector for DM6:DDO */
|
|
u8 head; /* "real" number of heads */
|
|
u8 sect; /* "real" sectors per track */
|
|
u8 bios_head; /* BIOS/fdisk/LILO number of heads */
|
|
u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
|
|
|
|
unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
|
|
unsigned int cyl; /* "real" number of cyls */
|
|
unsigned int drive_data; /* used by set_pio_mode/selectproc */
|
|
unsigned int failures; /* current failure count */
|
|
unsigned int max_failures; /* maximum allowed failure count */
|
|
u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
|
|
|
|
u64 capacity64; /* total number of sectors */
|
|
|
|
int lun; /* logical unit */
|
|
int crc_count; /* crc counter to reduce drive speed */
|
|
#ifdef CONFIG_BLK_DEV_IDEACPI
|
|
struct ide_acpi_drive_link *acpidata;
|
|
#endif
|
|
struct list_head list;
|
|
struct device gendev;
|
|
struct completion gendev_rel_comp; /* to deal with device release() */
|
|
} ide_drive_t;
|
|
|
|
#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
|
|
|
|
#define IDE_CHIPSET_PCI_MASK \
|
|
((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
|
|
#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
|
|
|
|
struct ide_port_info;
|
|
|
|
typedef struct hwif_s {
|
|
struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
|
|
struct hwif_s *mate; /* other hwif from same PCI chip */
|
|
struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
|
|
struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
|
|
|
|
char name[6]; /* name of interface, eg. "ide0" */
|
|
|
|
/* task file registers for pata and sata */
|
|
unsigned long io_ports[IDE_NR_PORTS];
|
|
unsigned long sata_scr[SATA_NR_PORTS];
|
|
unsigned long sata_misc[SATA_NR_PORTS];
|
|
|
|
ide_drive_t drives[MAX_DRIVES]; /* drive info */
|
|
|
|
u8 major; /* our major number */
|
|
u8 index; /* 0 for ide0; 1 for ide1; ... */
|
|
u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
|
|
u8 straight8; /* Alan's straight 8 check */
|
|
u8 bus_state; /* power state of the IDE bus */
|
|
|
|
u32 host_flags;
|
|
|
|
u8 pio_mask;
|
|
|
|
u8 ultra_mask;
|
|
u8 mwdma_mask;
|
|
u8 swdma_mask;
|
|
|
|
u8 cbl; /* cable type */
|
|
|
|
hwif_chipset_t chipset; /* sub-module for tuning.. */
|
|
|
|
struct pci_dev *pci_dev; /* for pci chipsets */
|
|
const struct ide_port_info *cds; /* chipset device struct */
|
|
|
|
ide_ack_intr_t *ack_intr;
|
|
|
|
void (*rw_disk)(ide_drive_t *, struct request *);
|
|
|
|
#if 0
|
|
ide_hwif_ops_t *hwifops;
|
|
#else
|
|
/* routine to program host for PIO mode */
|
|
void (*set_pio_mode)(ide_drive_t *, const u8);
|
|
/* routine to program host for DMA mode */
|
|
void (*set_dma_mode)(ide_drive_t *, const u8);
|
|
/* tweaks hardware to select drive */
|
|
void (*selectproc)(ide_drive_t *);
|
|
/* chipset polling based on hba specifics */
|
|
int (*reset_poll)(ide_drive_t *);
|
|
/* chipset specific changes to default for device-hba resets */
|
|
void (*pre_reset)(ide_drive_t *);
|
|
/* routine to reset controller after a disk reset */
|
|
void (*resetproc)(ide_drive_t *);
|
|
/* special interrupt handling for shared pci interrupts */
|
|
void (*intrproc)(ide_drive_t *);
|
|
/* special host masking for drive selection */
|
|
void (*maskproc)(ide_drive_t *, int);
|
|
/* check host's drive quirk list */
|
|
int (*quirkproc)(ide_drive_t *);
|
|
/* driver soft-power interface */
|
|
int (*busproc)(ide_drive_t *, int);
|
|
#endif
|
|
u8 (*mdma_filter)(ide_drive_t *);
|
|
u8 (*udma_filter)(ide_drive_t *);
|
|
|
|
void (*fixup)(struct hwif_s *);
|
|
|
|
void (*ata_input_data)(ide_drive_t *, void *, u32);
|
|
void (*ata_output_data)(ide_drive_t *, void *, u32);
|
|
|
|
void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
|
|
void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
|
|
|
|
int (*dma_setup)(ide_drive_t *);
|
|
void (*dma_exec_cmd)(ide_drive_t *, u8);
|
|
void (*dma_start)(ide_drive_t *);
|
|
int (*ide_dma_end)(ide_drive_t *drive);
|
|
int (*ide_dma_on)(ide_drive_t *drive);
|
|
void (*dma_off_quietly)(ide_drive_t *drive);
|
|
int (*ide_dma_test_irq)(ide_drive_t *drive);
|
|
void (*ide_dma_clear_irq)(ide_drive_t *drive);
|
|
void (*dma_host_on)(ide_drive_t *drive);
|
|
void (*dma_host_off)(ide_drive_t *drive);
|
|
void (*dma_lost_irq)(ide_drive_t *drive);
|
|
void (*dma_timeout)(ide_drive_t *drive);
|
|
|
|
void (*OUTB)(u8 addr, unsigned long port);
|
|
void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
|
|
void (*OUTW)(u16 addr, unsigned long port);
|
|
void (*OUTSW)(unsigned long port, void *addr, u32 count);
|
|
void (*OUTSL)(unsigned long port, void *addr, u32 count);
|
|
|
|
u8 (*INB)(unsigned long port);
|
|
u16 (*INW)(unsigned long port);
|
|
void (*INSW)(unsigned long port, void *addr, u32 count);
|
|
void (*INSL)(unsigned long port, void *addr, u32 count);
|
|
|
|
/* dma physical region descriptor table (cpu view) */
|
|
unsigned int *dmatable_cpu;
|
|
/* dma physical region descriptor table (dma view) */
|
|
dma_addr_t dmatable_dma;
|
|
/* Scatter-gather list used to build the above */
|
|
struct scatterlist *sg_table;
|
|
int sg_max_nents; /* Maximum number of entries in it */
|
|
int sg_nents; /* Current number of entries in it */
|
|
int sg_dma_direction; /* dma transfer direction */
|
|
|
|
/* data phase of the active command (currently only valid for PIO/DMA) */
|
|
int data_phase;
|
|
|
|
unsigned int nsect;
|
|
unsigned int nleft;
|
|
struct scatterlist *cursg;
|
|
unsigned int cursg_ofs;
|
|
|
|
int rqsize; /* max sectors per request */
|
|
int irq; /* our irq number */
|
|
|
|
unsigned long dma_master; /* reference base addr dmabase */
|
|
unsigned long dma_base; /* base addr for dma ports */
|
|
unsigned long dma_command; /* dma command register */
|
|
unsigned long dma_vendor1; /* dma vendor 1 register */
|
|
unsigned long dma_status; /* dma status register */
|
|
unsigned long dma_vendor3; /* dma vendor 3 register */
|
|
unsigned long dma_prdtable; /* actual prd table address */
|
|
|
|
unsigned long config_data; /* for use by chipset-specific code */
|
|
unsigned long select_data; /* for use by chipset-specific code */
|
|
|
|
unsigned long extra_base; /* extra addr for dma ports */
|
|
unsigned extra_ports; /* number of extra dma ports */
|
|
|
|
unsigned noprobe : 1; /* don't probe for this interface */
|
|
unsigned present : 1; /* this interface exists */
|
|
unsigned hold : 1; /* this interface is always present */
|
|
unsigned serialized : 1; /* serialized all channel operation */
|
|
unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
|
|
unsigned reset : 1; /* reset after probe */
|
|
unsigned auto_poll : 1; /* supports nop auto-poll */
|
|
unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
|
|
unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
|
|
unsigned mmio : 1; /* host uses MMIO */
|
|
|
|
struct device gendev;
|
|
struct completion gendev_rel_comp; /* To deal with device release() */
|
|
|
|
void *hwif_data; /* extra hwif data */
|
|
|
|
unsigned dma;
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEACPI
|
|
struct ide_acpi_hwif_link *acpidata;
|
|
#endif
|
|
} ____cacheline_internodealigned_in_smp ide_hwif_t;
|
|
|
|
/*
|
|
* internal ide interrupt handler type
|
|
*/
|
|
typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
|
|
typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
|
|
typedef int (ide_expiry_t)(ide_drive_t *);
|
|
|
|
typedef struct hwgroup_s {
|
|
/* irq handler, if active */
|
|
ide_startstop_t (*handler)(ide_drive_t *);
|
|
/* irq handler, suspended if active */
|
|
ide_startstop_t (*handler_save)(ide_drive_t *);
|
|
/* BOOL: protects all fields below */
|
|
volatile int busy;
|
|
/* BOOL: wake us up on timer expiry */
|
|
unsigned int sleeping : 1;
|
|
/* BOOL: polling active & poll_timeout field valid */
|
|
unsigned int polling : 1;
|
|
/* BOOL: in a polling reset situation. Must not trigger another reset yet */
|
|
unsigned int resetting : 1;
|
|
|
|
/* current drive */
|
|
ide_drive_t *drive;
|
|
/* ptr to current hwif in linked-list */
|
|
ide_hwif_t *hwif;
|
|
|
|
/* for pci chipsets */
|
|
struct pci_dev *pci_dev;
|
|
|
|
/* current request */
|
|
struct request *rq;
|
|
/* failsafe timer */
|
|
struct timer_list timer;
|
|
/* local copy of current write rq */
|
|
struct request wrq;
|
|
/* timeout value during long polls */
|
|
unsigned long poll_timeout;
|
|
/* queried upon timeouts */
|
|
int (*expiry)(ide_drive_t *);
|
|
/* ide_system_bus_speed */
|
|
int pio_clock;
|
|
int req_gen;
|
|
int req_gen_timer;
|
|
|
|
unsigned char cmd_buf[4];
|
|
} ide_hwgroup_t;
|
|
|
|
typedef struct ide_driver_s ide_driver_t;
|
|
|
|
extern struct mutex ide_setting_mtx;
|
|
|
|
int set_io_32bit(ide_drive_t *, int);
|
|
int set_pio_mode(ide_drive_t *, int);
|
|
int set_using_dma(ide_drive_t *, int);
|
|
|
|
#ifdef CONFIG_IDE_PROC_FS
|
|
/*
|
|
* configurable drive settings
|
|
*/
|
|
|
|
#define TYPE_INT 0
|
|
#define TYPE_BYTE 1
|
|
#define TYPE_SHORT 2
|
|
|
|
#define SETTING_READ (1 << 0)
|
|
#define SETTING_WRITE (1 << 1)
|
|
#define SETTING_RW (SETTING_READ | SETTING_WRITE)
|
|
|
|
typedef int (ide_procset_t)(ide_drive_t *, int);
|
|
typedef struct ide_settings_s {
|
|
char *name;
|
|
int rw;
|
|
int data_type;
|
|
int min;
|
|
int max;
|
|
int mul_factor;
|
|
int div_factor;
|
|
void *data;
|
|
ide_procset_t *set;
|
|
int auto_remove;
|
|
struct ide_settings_s *next;
|
|
} ide_settings_t;
|
|
|
|
int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
|
|
|
|
/*
|
|
* /proc/ide interface
|
|
*/
|
|
typedef struct {
|
|
const char *name;
|
|
mode_t mode;
|
|
read_proc_t *read_proc;
|
|
write_proc_t *write_proc;
|
|
} ide_proc_entry_t;
|
|
|
|
void proc_ide_create(void);
|
|
void proc_ide_destroy(void);
|
|
void ide_proc_register_port(ide_hwif_t *);
|
|
void ide_proc_unregister_port(ide_hwif_t *);
|
|
void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
|
|
void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
|
|
|
|
void ide_add_generic_settings(ide_drive_t *);
|
|
|
|
read_proc_t proc_ide_read_capacity;
|
|
read_proc_t proc_ide_read_geometry;
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEPCI
|
|
void ide_pci_create_host_proc(const char *, get_info_t *);
|
|
#endif
|
|
|
|
/*
|
|
* Standard exit stuff:
|
|
*/
|
|
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
|
|
{ \
|
|
len -= off; \
|
|
if (len < count) { \
|
|
*eof = 1; \
|
|
if (len <= 0) \
|
|
return 0; \
|
|
} else \
|
|
len = count; \
|
|
*start = page + off; \
|
|
return len; \
|
|
}
|
|
#else
|
|
static inline void proc_ide_create(void) { ; }
|
|
static inline void proc_ide_destroy(void) { ; }
|
|
static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
|
|
static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
|
|
static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
|
|
static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
|
|
static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
|
|
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
|
|
#endif
|
|
|
|
/*
|
|
* Power Management step value (rq->pm->pm_step).
|
|
*
|
|
* The step value starts at 0 (ide_pm_state_start_suspend) for a
|
|
* suspend operation or 1000 (ide_pm_state_start_resume) for a
|
|
* resume operation.
|
|
*
|
|
* For each step, the core calls the subdriver start_power_step() first.
|
|
* This can return:
|
|
* - ide_stopped : In this case, the core calls us back again unless
|
|
* step have been set to ide_power_state_completed.
|
|
* - ide_started : In this case, the channel is left busy until an
|
|
* async event (interrupt) occurs.
|
|
* Typically, start_power_step() will issue a taskfile request with
|
|
* do_rw_taskfile().
|
|
*
|
|
* Upon reception of the interrupt, the core will call complete_power_step()
|
|
* with the error code if any. This routine should update the step value
|
|
* and return. It should not start a new request. The core will call
|
|
* start_power_step for the new step value, unless step have been set to
|
|
* ide_power_state_completed.
|
|
*
|
|
* Subdrivers are expected to define their own additional power
|
|
* steps from 1..999 for suspend and from 1001..1999 for resume,
|
|
* other values are reserved for future use.
|
|
*/
|
|
|
|
enum {
|
|
ide_pm_state_completed = -1,
|
|
ide_pm_state_start_suspend = 0,
|
|
ide_pm_state_start_resume = 1000,
|
|
};
|
|
|
|
/*
|
|
* Subdrivers support.
|
|
*
|
|
* The gendriver.owner field should be set to the module owner of this driver.
|
|
* The gendriver.name field should be set to the name of this driver
|
|
*/
|
|
struct ide_driver_s {
|
|
const char *version;
|
|
u8 media;
|
|
unsigned supports_dsc_overlap : 1;
|
|
ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
|
|
int (*end_request)(ide_drive_t *, int, int);
|
|
ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
|
|
ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
|
|
struct device_driver gen_driver;
|
|
int (*probe)(ide_drive_t *);
|
|
void (*remove)(ide_drive_t *);
|
|
void (*resume)(ide_drive_t *);
|
|
void (*shutdown)(ide_drive_t *);
|
|
#ifdef CONFIG_IDE_PROC_FS
|
|
ide_proc_entry_t *proc;
|
|
#endif
|
|
};
|
|
|
|
#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
|
|
|
|
int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
|
|
|
|
/*
|
|
* ide_hwifs[] is the master data structure used to keep track
|
|
* of just about everything in ide.c. Whenever possible, routines
|
|
* should be using pointers to a drive (ide_drive_t *) or
|
|
* pointers to a hwif (ide_hwif_t *), rather than indexing this
|
|
* structure directly (the allocation/layout may change!).
|
|
*
|
|
*/
|
|
#ifndef _IDE_C
|
|
extern ide_hwif_t ide_hwifs[]; /* master data repository */
|
|
#endif
|
|
extern int noautodma;
|
|
|
|
extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
|
|
int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
|
|
int uptodate, int nr_sectors);
|
|
|
|
extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
|
|
|
|
extern void ide_execute_command(ide_drive_t *, task_ioreg_t cmd, ide_handler_t *, unsigned int, ide_expiry_t *);
|
|
|
|
ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
|
|
|
|
ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
|
|
|
|
ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
|
|
|
|
extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
|
|
|
|
extern void ide_fix_driveid(struct hd_driveid *);
|
|
/*
|
|
* ide_fixstring() cleans up and (optionally) byte-swaps a text string,
|
|
* removing leading/trailing blanks and compressing internal blanks.
|
|
* It is primarily used to tidy up the model name/number fields as
|
|
* returned by the WIN_[P]IDENTIFY commands.
|
|
*
|
|
* (s, bytecount, byteswap)
|
|
*/
|
|
extern void ide_fixstring(u8 *, const int, const int);
|
|
|
|
int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
|
|
|
|
extern ide_startstop_t ide_do_reset (ide_drive_t *);
|
|
|
|
extern void ide_init_drive_cmd (struct request *rq);
|
|
|
|
/*
|
|
* "action" parameter type for ide_do_drive_cmd() below.
|
|
*/
|
|
typedef enum {
|
|
ide_wait, /* insert rq at end of list, and wait for it */
|
|
ide_preempt, /* insert rq in front of current request */
|
|
ide_head_wait, /* insert rq in front of current request and wait for it */
|
|
ide_end /* insert rq at end of list, but don't wait for it */
|
|
} ide_action_t;
|
|
|
|
extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
|
|
|
|
extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
|
|
|
|
/*
|
|
* Issue ATA command and wait for completion.
|
|
* Use for implementing commands in kernel
|
|
*
|
|
* (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
|
|
*/
|
|
extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
|
|
|
|
typedef struct ide_task_s {
|
|
/*
|
|
* struct hd_drive_task_hdr tf;
|
|
* task_struct_t tf;
|
|
* struct hd_drive_hob_hdr hobf;
|
|
* hob_struct_t hobf;
|
|
*/
|
|
task_ioreg_t tfRegister[8];
|
|
task_ioreg_t hobRegister[8];
|
|
ide_reg_valid_t tf_out_flags;
|
|
ide_reg_valid_t tf_in_flags;
|
|
int data_phase;
|
|
int command_type;
|
|
ide_pre_handler_t *prehandler;
|
|
ide_handler_t *handler;
|
|
struct request *rq; /* copy of request */
|
|
void *special; /* valid_t generally */
|
|
} ide_task_t;
|
|
|
|
extern u32 ide_read_24(ide_drive_t *);
|
|
|
|
extern void SELECT_DRIVE(ide_drive_t *);
|
|
extern void SELECT_INTERRUPT(ide_drive_t *);
|
|
extern void SELECT_MASK(ide_drive_t *, int);
|
|
extern void QUIRK_LIST(ide_drive_t *);
|
|
|
|
extern int drive_is_ready(ide_drive_t *);
|
|
|
|
/*
|
|
* taskfile io for disks for now...and builds request from ide_ioctl
|
|
*/
|
|
extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
|
|
|
|
/*
|
|
* Special Flagged Register Validation Caller
|
|
*/
|
|
extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
|
|
|
|
extern ide_startstop_t set_multmode_intr(ide_drive_t *);
|
|
extern ide_startstop_t set_geometry_intr(ide_drive_t *);
|
|
extern ide_startstop_t recal_intr(ide_drive_t *);
|
|
extern ide_startstop_t task_no_data_intr(ide_drive_t *);
|
|
extern ide_startstop_t task_in_intr(ide_drive_t *);
|
|
extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
|
|
|
|
extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
|
|
|
|
int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
|
|
int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
|
|
int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
|
|
|
|
extern int system_bus_clock(void);
|
|
|
|
extern int ide_driveid_update(ide_drive_t *);
|
|
extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
|
|
extern int ide_config_drive_speed(ide_drive_t *, u8);
|
|
extern u8 eighty_ninty_three (ide_drive_t *);
|
|
extern int set_transfer(ide_drive_t *, ide_task_t *);
|
|
extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
|
|
|
|
extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
|
|
|
|
extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
|
|
|
|
extern int ide_spin_wait_hwgroup(ide_drive_t *);
|
|
extern void ide_timer_expiry(unsigned long);
|
|
extern irqreturn_t ide_intr(int irq, void *dev_id);
|
|
extern void do_ide_request(struct request_queue *);
|
|
|
|
void ide_init_disk(struct gendisk *, ide_drive_t *);
|
|
|
|
extern int ideprobe_init(void);
|
|
|
|
#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
|
|
extern void ide_scan_pcibus(int scan_direction) __init;
|
|
extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
|
|
#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
|
|
#else
|
|
#define ide_pci_register_driver(d) pci_register_driver(d)
|
|
#endif
|
|
|
|
void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
|
|
void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
|
|
|
|
extern void default_hwif_iops(ide_hwif_t *);
|
|
extern void default_hwif_mmiops(ide_hwif_t *);
|
|
extern void default_hwif_transport(ide_hwif_t *);
|
|
|
|
typedef struct ide_pci_enablebit_s {
|
|
u8 reg; /* byte pci reg holding the enable-bit */
|
|
u8 mask; /* mask to isolate the enable-bit */
|
|
u8 val; /* value of masked reg when "enabled" */
|
|
} ide_pci_enablebit_t;
|
|
|
|
enum {
|
|
/* Uses ISA control ports not PCI ones. */
|
|
IDE_HFLAG_ISA_PORTS = (1 << 0),
|
|
/* single port device */
|
|
IDE_HFLAG_SINGLE = (1 << 1),
|
|
/* don't use legacy PIO blacklist */
|
|
IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
|
|
/* don't use conservative PIO "downgrade" */
|
|
IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
|
|
/* use PIO8/9 for prefetch off/on */
|
|
IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
|
|
/* use PIO6/7 for fast-devsel off/on */
|
|
IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
|
|
/* use 100-102 and 200-202 PIO values to set DMA modes */
|
|
IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
|
|
/*
|
|
* keep DMA setting when programming PIO mode, may be used only
|
|
* for hosts which have separate PIO and DMA timings (ie. PMAC)
|
|
*/
|
|
IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
|
|
/* program host for the transfer mode after programming device */
|
|
IDE_HFLAG_POST_SET_MODE = (1 << 8),
|
|
/* don't program host/device for the transfer mode ("smart" hosts) */
|
|
IDE_HFLAG_NO_SET_MODE = (1 << 9),
|
|
/* trust BIOS for programming chipset/device for DMA */
|
|
IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
|
|
/* host uses VDMA */
|
|
IDE_HFLAG_VDMA = (1 << 11),
|
|
/* ATAPI DMA is unsupported */
|
|
IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
|
|
/* set if host is a "bootable" controller */
|
|
IDE_HFLAG_BOOTABLE = (1 << 13),
|
|
/* host doesn't support DMA */
|
|
IDE_HFLAG_NO_DMA = (1 << 14),
|
|
/* check if host is PCI IDE device before allowing DMA */
|
|
IDE_HFLAG_NO_AUTODMA = (1 << 15),
|
|
/* host is CS5510/CS5520 */
|
|
IDE_HFLAG_CS5520 = (1 << 16),
|
|
/* no LBA48 */
|
|
IDE_HFLAG_NO_LBA48 = (1 << 17),
|
|
/* no LBA48 DMA */
|
|
IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
|
|
/* data FIFO is cleared by an error */
|
|
IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
|
|
/* serialize ports */
|
|
IDE_HFLAG_SERIALIZE = (1 << 20),
|
|
/* use legacy IRQs */
|
|
IDE_HFLAG_LEGACY_IRQS = (1 << 21),
|
|
/* force use of legacy IRQs */
|
|
IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
|
|
/* limit LBA48 requests to 256 sectors */
|
|
IDE_HFLAG_RQSIZE_256 = (1 << 23),
|
|
/* use 32-bit I/O ops */
|
|
IDE_HFLAG_IO_32BIT = (1 << 24),
|
|
/* unmask IRQs */
|
|
IDE_HFLAG_UNMASK_IRQS = (1 << 25),
|
|
};
|
|
|
|
#ifdef CONFIG_BLK_DEV_OFFBOARD
|
|
# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
|
|
#else
|
|
# define IDE_HFLAG_OFF_BOARD 0
|
|
#endif
|
|
|
|
struct ide_port_info {
|
|
char *name;
|
|
unsigned int (*init_chipset)(struct pci_dev *, const char *);
|
|
void (*init_iops)(ide_hwif_t *);
|
|
void (*init_hwif)(ide_hwif_t *);
|
|
void (*init_dma)(ide_hwif_t *, unsigned long);
|
|
void (*fixup)(ide_hwif_t *);
|
|
ide_pci_enablebit_t enablebits[2];
|
|
hwif_chipset_t chipset;
|
|
unsigned int extra;
|
|
u32 host_flags;
|
|
u8 pio_mask;
|
|
u8 swdma_mask;
|
|
u8 mwdma_mask;
|
|
u8 udma_mask;
|
|
};
|
|
|
|
int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
|
|
int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
|
|
|
|
void ide_map_sg(ide_drive_t *, struct request *);
|
|
void ide_init_sg_cmd(ide_drive_t *, struct request *);
|
|
|
|
#define BAD_DMA_DRIVE 0
|
|
#define GOOD_DMA_DRIVE 1
|
|
|
|
struct drive_list_entry {
|
|
const char *id_model;
|
|
const char *id_firmware;
|
|
};
|
|
|
|
int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEDMA
|
|
int __ide_dma_bad_drive(ide_drive_t *);
|
|
|
|
u8 ide_find_dma_mode(ide_drive_t *, u8);
|
|
|
|
static inline u8 ide_max_dma_mode(ide_drive_t *drive)
|
|
{
|
|
return ide_find_dma_mode(drive, XFER_UDMA_6);
|
|
}
|
|
|
|
void ide_dma_off(ide_drive_t *);
|
|
void ide_dma_verbose(ide_drive_t *);
|
|
int ide_set_dma(ide_drive_t *);
|
|
ide_startstop_t ide_dma_intr(ide_drive_t *);
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
|
|
extern int ide_build_sglist(ide_drive_t *, struct request *);
|
|
extern int ide_build_dmatable(ide_drive_t *, struct request *);
|
|
extern void ide_destroy_dmatable(ide_drive_t *);
|
|
extern int ide_release_dma(ide_hwif_t *);
|
|
extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
|
|
|
|
void ide_dma_host_off(ide_drive_t *);
|
|
void ide_dma_off_quietly(ide_drive_t *);
|
|
void ide_dma_host_on(ide_drive_t *);
|
|
extern int __ide_dma_on(ide_drive_t *);
|
|
extern int ide_dma_setup(ide_drive_t *);
|
|
extern void ide_dma_start(ide_drive_t *);
|
|
extern int __ide_dma_end(ide_drive_t *);
|
|
extern void ide_dma_lost_irq(ide_drive_t *);
|
|
extern void ide_dma_timeout(ide_drive_t *);
|
|
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
|
|
|
|
#else
|
|
static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
|
|
static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
|
|
static inline void ide_dma_off(ide_drive_t *drive) { ; }
|
|
static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
|
|
static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
|
|
#endif /* CONFIG_BLK_DEV_IDEDMA */
|
|
|
|
#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
|
|
static inline void ide_release_dma(ide_hwif_t *drive) {;}
|
|
#endif
|
|
|
|
#ifdef CONFIG_BLK_DEV_IDEACPI
|
|
extern int ide_acpi_exec_tfs(ide_drive_t *drive);
|
|
extern void ide_acpi_get_timing(ide_hwif_t *hwif);
|
|
extern void ide_acpi_push_timing(ide_hwif_t *hwif);
|
|
extern void ide_acpi_init(ide_hwif_t *hwif);
|
|
extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
|
|
#else
|
|
static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
|
|
static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
|
|
static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
|
|
static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
|
|
static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
|
|
#endif
|
|
|
|
extern int ide_hwif_request_regions(ide_hwif_t *hwif);
|
|
extern void ide_hwif_release_regions(ide_hwif_t* hwif);
|
|
extern void ide_unregister (unsigned int index);
|
|
|
|
void ide_register_region(struct gendisk *);
|
|
void ide_unregister_region(struct gendisk *);
|
|
|
|
void ide_undecoded_slave(ide_hwif_t *);
|
|
|
|
int ide_device_add(u8 idx[4]);
|
|
|
|
static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
|
|
{
|
|
return hwif->hwif_data;
|
|
}
|
|
|
|
static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
|
|
{
|
|
hwif->hwif_data = data;
|
|
}
|
|
|
|
/* ide-lib.c */
|
|
extern char *ide_xfer_verbose(u8 xfer_rate);
|
|
extern void ide_toggle_bounce(ide_drive_t *drive, int on);
|
|
extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
|
|
|
|
static inline int ide_dev_has_iordy(struct hd_driveid *id)
|
|
{
|
|
return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
|
|
}
|
|
|
|
static inline int ide_dev_is_sata(struct hd_driveid *id)
|
|
{
|
|
/*
|
|
* See if word 93 is 0 AND drive is at least ATA-5 compatible
|
|
* verifying that word 80 by casting it to a signed type --
|
|
* this trick allows us to filter out the reserved values of
|
|
* 0x0000 and 0xffff along with the earlier ATA revisions...
|
|
*/
|
|
if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
|
|
return 1;
|
|
return 0;
|
|
}
|
|
|
|
u8 ide_dump_status(ide_drive_t *, const char *, u8);
|
|
|
|
typedef struct ide_pio_timings_s {
|
|
int setup_time; /* Address setup (ns) minimum */
|
|
int active_time; /* Active pulse (ns) minimum */
|
|
int cycle_time; /* Cycle time (ns) minimum = */
|
|
/* active + recovery (+ setup for some chips) */
|
|
} ide_pio_timings_t;
|
|
|
|
unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
|
|
u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
|
|
extern const ide_pio_timings_t ide_pio_timings[6];
|
|
|
|
int ide_set_pio_mode(ide_drive_t *, u8);
|
|
int ide_set_dma_mode(ide_drive_t *, u8);
|
|
|
|
void ide_set_pio(ide_drive_t *, u8);
|
|
|
|
static inline void ide_set_max_pio(ide_drive_t *drive)
|
|
{
|
|
ide_set_pio(drive, 255);
|
|
}
|
|
|
|
extern spinlock_t ide_lock;
|
|
extern struct mutex ide_cfg_mtx;
|
|
/*
|
|
* Structure locking:
|
|
*
|
|
* ide_cfg_mtx and ide_lock together protect changes to
|
|
* ide_hwif_t->{next,hwgroup}
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* ide_drive_t->next
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*
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* ide_hwgroup_t->busy: ide_lock
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* ide_hwgroup_t->hwif: ide_lock
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* ide_hwif_t->mate: constant, no locking
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* ide_drive_t->hwif: constant, no locking
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*/
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#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
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extern struct bus_type ide_bus_type;
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/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
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#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
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/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
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#define ide_id_has_flush_cache_ext(id) \
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(((id)->cfs_enable_2 & 0x2400) == 0x2400)
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static inline int hwif_to_node(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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return dev ? pcibus_to_node(dev->bus) : -1;
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}
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static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
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|
{
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ide_hwif_t *hwif = HWIF(drive);
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return &hwif->drives[(drive->dn ^ 1) & 1];
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}
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#endif /* _IDE_H */
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