56a6b1eb7b
Implement __fls on all 64-bit archs: alpha has an implementation of fls64. Added __fls(x) = fls64(x) - 1. ia64 has fls, but not __fls. Added __fls based on code of fls. mips and powerpc have __ilog2, which is the same as __fls. Added __fls = __ilog2. parisc, s390, sh and sparc64: Include generic __fls. x86_64 already has __fls. Signed-off-by: Alexander van Heukelum <heukelum@fastmail.fm> Signed-off-by: Ingo Molnar <mingo@elte.hu>
885 lines
23 KiB
C
885 lines
23 KiB
C
#ifndef _S390_BITOPS_H
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#define _S390_BITOPS_H
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/*
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* include/asm-s390/bitops.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/bitops.h"
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* Copyright (C) 1992, Linus Torvalds
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*
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*/
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#ifdef __KERNEL__
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#include <linux/compiler.h>
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/*
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* 32 bit bitops format:
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* bit 0 is the LSB of *addr; bit 31 is the MSB of *addr;
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* bit 32 is the LSB of *(addr+4). That combined with the
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* big endian byte order on S390 give the following bit
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* order in memory:
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* 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \
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* 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
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* after that follows the next long with bit numbers
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* 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
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* 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
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* The reason for this bit ordering is the fact that
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* in the architecture independent code bits operations
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* of the form "flags |= (1 << bitnr)" are used INTERMIXED
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* with operation of the form "set_bit(bitnr, flags)".
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*
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* 64 bit bitops format:
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* bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
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* bit 64 is the LSB of *(addr+8). That combined with the
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* big endian byte order on S390 give the following bit
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* order in memory:
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* 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
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* 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
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* 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
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* 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
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* after that follows the next long with bit numbers
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* 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
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* 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
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* 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
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* 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
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* The reason for this bit ordering is the fact that
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* in the architecture independent code bits operations
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* of the form "flags |= (1 << bitnr)" are used INTERMIXED
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* with operation of the form "set_bit(bitnr, flags)".
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*/
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/* bitmap tables from arch/S390/kernel/bitmap.S */
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extern const char _oi_bitmap[];
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extern const char _ni_bitmap[];
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extern const char _zb_findmap[];
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extern const char _sb_findmap[];
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#ifndef __s390x__
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#define __BITOPS_ALIGN 3
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#define __BITOPS_WORDSIZE 32
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#define __BITOPS_OR "or"
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#define __BITOPS_AND "nr"
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#define __BITOPS_XOR "xr"
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#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
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#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
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asm volatile( \
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" l %0,%2\n" \
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"0: lr %1,%0\n" \
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__op_string " %1,%3\n" \
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" cs %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), \
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"=Q" (*(unsigned long *) __addr) \
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: "d" (__val), "Q" (*(unsigned long *) __addr) \
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: "cc");
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#else /* __GNUC__ */
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#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
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asm volatile( \
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" l %0,0(%4)\n" \
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"0: lr %1,%0\n" \
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__op_string " %1,%3\n" \
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" cs %0,%1,0(%4)\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), \
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"=m" (*(unsigned long *) __addr) \
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: "d" (__val), "a" (__addr), \
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"m" (*(unsigned long *) __addr) : "cc");
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#endif /* __GNUC__ */
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#else /* __s390x__ */
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#define __BITOPS_ALIGN 7
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#define __BITOPS_WORDSIZE 64
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#define __BITOPS_OR "ogr"
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#define __BITOPS_AND "ngr"
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#define __BITOPS_XOR "xgr"
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#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
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#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
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asm volatile( \
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" lg %0,%2\n" \
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"0: lgr %1,%0\n" \
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__op_string " %1,%3\n" \
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" csg %0,%1,%2\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), \
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"=Q" (*(unsigned long *) __addr) \
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: "d" (__val), "Q" (*(unsigned long *) __addr) \
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: "cc");
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#else /* __GNUC__ */
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#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
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asm volatile( \
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" lg %0,0(%4)\n" \
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"0: lgr %1,%0\n" \
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__op_string " %1,%3\n" \
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" csg %0,%1,0(%4)\n" \
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" jl 0b" \
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: "=&d" (__old), "=&d" (__new), \
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"=m" (*(unsigned long *) __addr) \
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: "d" (__val), "a" (__addr), \
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"m" (*(unsigned long *) __addr) : "cc");
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#endif /* __GNUC__ */
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#endif /* __s390x__ */
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#define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)
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#define __BITOPS_BARRIER() asm volatile("" : : : "memory")
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#ifdef CONFIG_SMP
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/*
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* SMP safe set_bit routine based on compare and swap (CS)
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*/
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static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make OR mask */
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mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
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}
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/*
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* SMP safe clear_bit routine based on compare and swap (CS)
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*/
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static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make AND mask */
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mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
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}
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/*
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* SMP safe change_bit routine based on compare and swap (CS)
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*/
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static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make XOR mask */
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mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
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}
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/*
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* SMP safe test_and_set_bit routine based on compare and swap (CS)
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*/
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static inline int
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test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make OR/test mask */
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mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
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__BITOPS_BARRIER();
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return (old & mask) != 0;
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}
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/*
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* SMP safe test_and_clear_bit routine based on compare and swap (CS)
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*/
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static inline int
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test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make AND/test mask */
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mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
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__BITOPS_BARRIER();
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return (old ^ new) != 0;
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}
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/*
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* SMP safe test_and_change_bit routine based on compare and swap (CS)
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*/
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static inline int
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test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr, old, new, mask;
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addr = (unsigned long) ptr;
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/* calculate address for CS */
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addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
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/* make XOR/test mask */
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mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
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/* Do the atomic update. */
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__BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
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__BITOPS_BARRIER();
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return (old & mask) != 0;
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}
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#endif /* CONFIG_SMP */
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/*
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* fast, non-SMP set_bit routine
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*/
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static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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asm volatile(
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" oc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr) : "a" (addr),
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"a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
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}
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static inline void
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__constant_set_bit(const unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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*(unsigned char *) addr |= 1 << (nr & 7);
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}
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#define set_bit_simple(nr,addr) \
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(__builtin_constant_p((nr)) ? \
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__constant_set_bit((nr),(addr)) : \
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__set_bit((nr),(addr)) )
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/*
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* fast, non-SMP clear_bit routine
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*/
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static inline void
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__clear_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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asm volatile(
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" nc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr) : "a" (addr),
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"a" (_ni_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc");
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}
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static inline void
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__constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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*(unsigned char *) addr &= ~(1 << (nr & 7));
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}
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#define clear_bit_simple(nr,addr) \
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(__builtin_constant_p((nr)) ? \
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__constant_clear_bit((nr),(addr)) : \
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__clear_bit((nr),(addr)) )
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/*
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* fast, non-SMP change_bit routine
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*/
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static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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asm volatile(
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" xc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr) : "a" (addr),
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"a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
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}
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static inline void
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__constant_change_bit(const unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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*(unsigned char *) addr ^= 1 << (nr & 7);
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}
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#define change_bit_simple(nr,addr) \
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(__builtin_constant_p((nr)) ? \
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__constant_change_bit((nr),(addr)) : \
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__change_bit((nr),(addr)) )
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/*
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* fast, non-SMP test_and_set_bit routine
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*/
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static inline int
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test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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unsigned char ch;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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ch = *(unsigned char *) addr;
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asm volatile(
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" oc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr)
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: "a" (addr), "a" (_oi_bitmap + (nr & 7)),
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"m" (*(char *) addr) : "cc", "memory");
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return (ch >> (nr & 7)) & 1;
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}
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#define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
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/*
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* fast, non-SMP test_and_clear_bit routine
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*/
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static inline int
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test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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unsigned char ch;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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ch = *(unsigned char *) addr;
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asm volatile(
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" nc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr)
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: "a" (addr), "a" (_ni_bitmap + (nr & 7)),
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"m" (*(char *) addr) : "cc", "memory");
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return (ch >> (nr & 7)) & 1;
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}
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#define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
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/*
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* fast, non-SMP test_and_change_bit routine
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*/
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static inline int
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test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr)
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{
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unsigned long addr;
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unsigned char ch;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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ch = *(unsigned char *) addr;
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asm volatile(
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" xc 0(1,%1),0(%2)"
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: "=m" (*(char *) addr)
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: "a" (addr), "a" (_oi_bitmap + (nr & 7)),
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"m" (*(char *) addr) : "cc", "memory");
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return (ch >> (nr & 7)) & 1;
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}
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#define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
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#ifdef CONFIG_SMP
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#define set_bit set_bit_cs
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#define clear_bit clear_bit_cs
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#define change_bit change_bit_cs
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#define test_and_set_bit test_and_set_bit_cs
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#define test_and_clear_bit test_and_clear_bit_cs
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#define test_and_change_bit test_and_change_bit_cs
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#else
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#define set_bit set_bit_simple
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#define clear_bit clear_bit_simple
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#define change_bit change_bit_simple
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#define test_and_set_bit test_and_set_bit_simple
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#define test_and_clear_bit test_and_clear_bit_simple
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#define test_and_change_bit test_and_change_bit_simple
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#endif
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/*
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* This routine doesn't need to be atomic.
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*/
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static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr)
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{
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unsigned long addr;
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unsigned char ch;
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addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
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ch = *(volatile unsigned char *) addr;
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return (ch >> (nr & 7)) & 1;
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}
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static inline int
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__constant_test_bit(unsigned long nr, const volatile unsigned long *addr) {
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return (((volatile char *) addr)
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[(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7))) != 0;
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p((nr)) ? \
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__constant_test_bit((nr),(addr)) : \
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__test_bit((nr),(addr)) )
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/*
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* Optimized find bit helper functions.
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*/
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/**
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* __ffz_word_loop - find byte offset of first long != -1UL
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* @addr: pointer to array of unsigned long
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* @size: size of the array in bits
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*/
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static inline unsigned long __ffz_word_loop(const unsigned long *addr,
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unsigned long size)
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{
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typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
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unsigned long bytes = 0;
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asm volatile(
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#ifndef __s390x__
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" ahi %1,-1\n"
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" sra %1,5\n"
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" jz 1f\n"
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"0: c %2,0(%0,%3)\n"
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" jne 1f\n"
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" la %0,4(%0)\n"
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" brct %1,0b\n"
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"1:\n"
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#else
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" aghi %1,-1\n"
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" srag %1,%1,6\n"
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" jz 1f\n"
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"0: cg %2,0(%0,%3)\n"
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" jne 1f\n"
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" la %0,8(%0)\n"
|
|
" brct %1,0b\n"
|
|
"1:\n"
|
|
#endif
|
|
: "+&a" (bytes), "+&d" (size)
|
|
: "d" (-1UL), "a" (addr), "m" (*(addrtype *) addr)
|
|
: "cc" );
|
|
return bytes;
|
|
}
|
|
|
|
/**
|
|
* __ffs_word_loop - find byte offset of first long != 0UL
|
|
* @addr: pointer to array of unsigned long
|
|
* @size: size of the array in bits
|
|
*/
|
|
static inline unsigned long __ffs_word_loop(const unsigned long *addr,
|
|
unsigned long size)
|
|
{
|
|
typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
|
|
unsigned long bytes = 0;
|
|
|
|
asm volatile(
|
|
#ifndef __s390x__
|
|
" ahi %1,-1\n"
|
|
" sra %1,5\n"
|
|
" jz 1f\n"
|
|
"0: c %2,0(%0,%3)\n"
|
|
" jne 1f\n"
|
|
" la %0,4(%0)\n"
|
|
" brct %1,0b\n"
|
|
"1:\n"
|
|
#else
|
|
" aghi %1,-1\n"
|
|
" srag %1,%1,6\n"
|
|
" jz 1f\n"
|
|
"0: cg %2,0(%0,%3)\n"
|
|
" jne 1f\n"
|
|
" la %0,8(%0)\n"
|
|
" brct %1,0b\n"
|
|
"1:\n"
|
|
#endif
|
|
: "+&a" (bytes), "+&a" (size)
|
|
: "d" (0UL), "a" (addr), "m" (*(addrtype *) addr)
|
|
: "cc" );
|
|
return bytes;
|
|
}
|
|
|
|
/**
|
|
* __ffz_word - add number of the first unset bit
|
|
* @nr: base value the bit number is added to
|
|
* @word: the word that is searched for unset bits
|
|
*/
|
|
static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
|
|
{
|
|
#ifdef __s390x__
|
|
if (likely((word & 0xffffffff) == 0xffffffff)) {
|
|
word >>= 32;
|
|
nr += 32;
|
|
}
|
|
#endif
|
|
if (likely((word & 0xffff) == 0xffff)) {
|
|
word >>= 16;
|
|
nr += 16;
|
|
}
|
|
if (likely((word & 0xff) == 0xff)) {
|
|
word >>= 8;
|
|
nr += 8;
|
|
}
|
|
return nr + _zb_findmap[(unsigned char) word];
|
|
}
|
|
|
|
/**
|
|
* __ffs_word - add number of the first set bit
|
|
* @nr: base value the bit number is added to
|
|
* @word: the word that is searched for set bits
|
|
*/
|
|
static inline unsigned long __ffs_word(unsigned long nr, unsigned long word)
|
|
{
|
|
#ifdef __s390x__
|
|
if (likely((word & 0xffffffff) == 0)) {
|
|
word >>= 32;
|
|
nr += 32;
|
|
}
|
|
#endif
|
|
if (likely((word & 0xffff) == 0)) {
|
|
word >>= 16;
|
|
nr += 16;
|
|
}
|
|
if (likely((word & 0xff) == 0)) {
|
|
word >>= 8;
|
|
nr += 8;
|
|
}
|
|
return nr + _sb_findmap[(unsigned char) word];
|
|
}
|
|
|
|
|
|
/**
|
|
* __load_ulong_be - load big endian unsigned long
|
|
* @p: pointer to array of unsigned long
|
|
* @offset: byte offset of source value in the array
|
|
*/
|
|
static inline unsigned long __load_ulong_be(const unsigned long *p,
|
|
unsigned long offset)
|
|
{
|
|
p = (unsigned long *)((unsigned long) p + offset);
|
|
return *p;
|
|
}
|
|
|
|
/**
|
|
* __load_ulong_le - load little endian unsigned long
|
|
* @p: pointer to array of unsigned long
|
|
* @offset: byte offset of source value in the array
|
|
*/
|
|
static inline unsigned long __load_ulong_le(const unsigned long *p,
|
|
unsigned long offset)
|
|
{
|
|
unsigned long word;
|
|
|
|
p = (unsigned long *)((unsigned long) p + offset);
|
|
#ifndef __s390x__
|
|
asm volatile(
|
|
" ic %0,0(%1)\n"
|
|
" icm %0,2,1(%1)\n"
|
|
" icm %0,4,2(%1)\n"
|
|
" icm %0,8,3(%1)"
|
|
: "=&d" (word) : "a" (p), "m" (*p) : "cc");
|
|
#else
|
|
asm volatile(
|
|
" lrvg %0,%1"
|
|
: "=d" (word) : "m" (*p) );
|
|
#endif
|
|
return word;
|
|
}
|
|
|
|
/*
|
|
* The various find bit functions.
|
|
*/
|
|
|
|
/*
|
|
* ffz - find first zero in word.
|
|
* @word: The word to search
|
|
*
|
|
* Undefined if no zero exists, so code should check against ~0UL first.
|
|
*/
|
|
static inline unsigned long ffz(unsigned long word)
|
|
{
|
|
return __ffz_word(0, word);
|
|
}
|
|
|
|
/**
|
|
* __ffs - find first bit in word.
|
|
* @word: The word to search
|
|
*
|
|
* Undefined if no bit exists, so code should check against 0 first.
|
|
*/
|
|
static inline unsigned long __ffs (unsigned long word)
|
|
{
|
|
return __ffs_word(0, word);
|
|
}
|
|
|
|
/**
|
|
* ffs - find first bit set
|
|
* @x: the word to search
|
|
*
|
|
* This is defined the same way as
|
|
* the libc and compiler builtin ffs routines, therefore
|
|
* differs in spirit from the above ffz (man ffs).
|
|
*/
|
|
static inline int ffs(int x)
|
|
{
|
|
if (!x)
|
|
return 0;
|
|
return __ffs_word(1, x);
|
|
}
|
|
|
|
/**
|
|
* find_first_zero_bit - find the first zero bit in a memory region
|
|
* @addr: The address to start the search at
|
|
* @size: The maximum size to search
|
|
*
|
|
* Returns the bit-number of the first zero bit, not the number of the byte
|
|
* containing a bit.
|
|
*/
|
|
static inline unsigned long find_first_zero_bit(const unsigned long *addr,
|
|
unsigned long size)
|
|
{
|
|
unsigned long bytes, bits;
|
|
|
|
if (!size)
|
|
return 0;
|
|
bytes = __ffz_word_loop(addr, size);
|
|
bits = __ffz_word(bytes*8, __load_ulong_be(addr, bytes));
|
|
return (bits < size) ? bits : size;
|
|
}
|
|
|
|
/**
|
|
* find_first_bit - find the first set bit in a memory region
|
|
* @addr: The address to start the search at
|
|
* @size: The maximum size to search
|
|
*
|
|
* Returns the bit-number of the first set bit, not the number of the byte
|
|
* containing a bit.
|
|
*/
|
|
static inline unsigned long find_first_bit(const unsigned long * addr,
|
|
unsigned long size)
|
|
{
|
|
unsigned long bytes, bits;
|
|
|
|
if (!size)
|
|
return 0;
|
|
bytes = __ffs_word_loop(addr, size);
|
|
bits = __ffs_word(bytes*8, __load_ulong_be(addr, bytes));
|
|
return (bits < size) ? bits : size;
|
|
}
|
|
|
|
/**
|
|
* find_next_zero_bit - find the first zero bit in a memory region
|
|
* @addr: The address to base the search on
|
|
* @offset: The bitnumber to start searching at
|
|
* @size: The maximum size to search
|
|
*/
|
|
static inline int find_next_zero_bit (const unsigned long * addr,
|
|
unsigned long size,
|
|
unsigned long offset)
|
|
{
|
|
const unsigned long *p;
|
|
unsigned long bit, set;
|
|
|
|
if (offset >= size)
|
|
return size;
|
|
bit = offset & (__BITOPS_WORDSIZE - 1);
|
|
offset -= bit;
|
|
size -= offset;
|
|
p = addr + offset / __BITOPS_WORDSIZE;
|
|
if (bit) {
|
|
/*
|
|
* __ffz_word returns __BITOPS_WORDSIZE
|
|
* if no zero bit is present in the word.
|
|
*/
|
|
set = __ffz_word(0, *p >> bit) + bit;
|
|
if (set >= size)
|
|
return size + offset;
|
|
if (set < __BITOPS_WORDSIZE)
|
|
return set + offset;
|
|
offset += __BITOPS_WORDSIZE;
|
|
size -= __BITOPS_WORDSIZE;
|
|
p++;
|
|
}
|
|
return offset + find_first_zero_bit(p, size);
|
|
}
|
|
|
|
/**
|
|
* find_next_bit - find the first set bit in a memory region
|
|
* @addr: The address to base the search on
|
|
* @offset: The bitnumber to start searching at
|
|
* @size: The maximum size to search
|
|
*/
|
|
static inline int find_next_bit (const unsigned long * addr,
|
|
unsigned long size,
|
|
unsigned long offset)
|
|
{
|
|
const unsigned long *p;
|
|
unsigned long bit, set;
|
|
|
|
if (offset >= size)
|
|
return size;
|
|
bit = offset & (__BITOPS_WORDSIZE - 1);
|
|
offset -= bit;
|
|
size -= offset;
|
|
p = addr + offset / __BITOPS_WORDSIZE;
|
|
if (bit) {
|
|
/*
|
|
* __ffs_word returns __BITOPS_WORDSIZE
|
|
* if no one bit is present in the word.
|
|
*/
|
|
set = __ffs_word(0, *p & (~0UL << bit));
|
|
if (set >= size)
|
|
return size + offset;
|
|
if (set < __BITOPS_WORDSIZE)
|
|
return set + offset;
|
|
offset += __BITOPS_WORDSIZE;
|
|
size -= __BITOPS_WORDSIZE;
|
|
p++;
|
|
}
|
|
return offset + find_first_bit(p, size);
|
|
}
|
|
|
|
/*
|
|
* Every architecture must define this function. It's the fastest
|
|
* way of searching a 140-bit bitmap where the first 100 bits are
|
|
* unlikely to be set. It's guaranteed that at least one of the 140
|
|
* bits is cleared.
|
|
*/
|
|
static inline int sched_find_first_bit(unsigned long *b)
|
|
{
|
|
return find_first_bit(b, 140);
|
|
}
|
|
|
|
#include <asm-generic/bitops/fls.h>
|
|
#include <asm-generic/bitops/__fls.h>
|
|
#include <asm-generic/bitops/fls64.h>
|
|
|
|
#include <asm-generic/bitops/hweight.h>
|
|
#include <asm-generic/bitops/lock.h>
|
|
|
|
/*
|
|
* ATTENTION: intel byte ordering convention for ext2 and minix !!
|
|
* bit 0 is the LSB of addr; bit 31 is the MSB of addr;
|
|
* bit 32 is the LSB of (addr+4).
|
|
* That combined with the little endian byte order of Intel gives the
|
|
* following bit order in memory:
|
|
* 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
|
|
* 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
|
|
*/
|
|
|
|
#define ext2_set_bit(nr, addr) \
|
|
__test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
|
|
#define ext2_set_bit_atomic(lock, nr, addr) \
|
|
test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
|
|
#define ext2_clear_bit(nr, addr) \
|
|
__test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
|
|
#define ext2_clear_bit_atomic(lock, nr, addr) \
|
|
test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
|
|
#define ext2_test_bit(nr, addr) \
|
|
test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
|
|
|
|
static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size)
|
|
{
|
|
unsigned long bytes, bits;
|
|
|
|
if (!size)
|
|
return 0;
|
|
bytes = __ffz_word_loop(vaddr, size);
|
|
bits = __ffz_word(bytes*8, __load_ulong_le(vaddr, bytes));
|
|
return (bits < size) ? bits : size;
|
|
}
|
|
|
|
static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size,
|
|
unsigned long offset)
|
|
{
|
|
unsigned long *addr = vaddr, *p;
|
|
unsigned long bit, set;
|
|
|
|
if (offset >= size)
|
|
return size;
|
|
bit = offset & (__BITOPS_WORDSIZE - 1);
|
|
offset -= bit;
|
|
size -= offset;
|
|
p = addr + offset / __BITOPS_WORDSIZE;
|
|
if (bit) {
|
|
/*
|
|
* s390 version of ffz returns __BITOPS_WORDSIZE
|
|
* if no zero bit is present in the word.
|
|
*/
|
|
set = ffz(__load_ulong_le(p, 0) >> bit) + bit;
|
|
if (set >= size)
|
|
return size + offset;
|
|
if (set < __BITOPS_WORDSIZE)
|
|
return set + offset;
|
|
offset += __BITOPS_WORDSIZE;
|
|
size -= __BITOPS_WORDSIZE;
|
|
p++;
|
|
}
|
|
return offset + ext2_find_first_zero_bit(p, size);
|
|
}
|
|
|
|
static inline unsigned long ext2_find_first_bit(void *vaddr,
|
|
unsigned long size)
|
|
{
|
|
unsigned long bytes, bits;
|
|
|
|
if (!size)
|
|
return 0;
|
|
bytes = __ffs_word_loop(vaddr, size);
|
|
bits = __ffs_word(bytes*8, __load_ulong_le(vaddr, bytes));
|
|
return (bits < size) ? bits : size;
|
|
}
|
|
|
|
static inline int ext2_find_next_bit(void *vaddr, unsigned long size,
|
|
unsigned long offset)
|
|
{
|
|
unsigned long *addr = vaddr, *p;
|
|
unsigned long bit, set;
|
|
|
|
if (offset >= size)
|
|
return size;
|
|
bit = offset & (__BITOPS_WORDSIZE - 1);
|
|
offset -= bit;
|
|
size -= offset;
|
|
p = addr + offset / __BITOPS_WORDSIZE;
|
|
if (bit) {
|
|
/*
|
|
* s390 version of ffz returns __BITOPS_WORDSIZE
|
|
* if no zero bit is present in the word.
|
|
*/
|
|
set = ffs(__load_ulong_le(p, 0) >> bit) + bit;
|
|
if (set >= size)
|
|
return size + offset;
|
|
if (set < __BITOPS_WORDSIZE)
|
|
return set + offset;
|
|
offset += __BITOPS_WORDSIZE;
|
|
size -= __BITOPS_WORDSIZE;
|
|
p++;
|
|
}
|
|
return offset + ext2_find_first_bit(p, size);
|
|
}
|
|
|
|
#include <asm-generic/bitops/minix.h>
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif /* _S390_BITOPS_H */
|