6d2e857d02
The phys_io/io_pg_offst machine record variables were being set to bogus values, causing problems when enabling DEBUG_LL. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
29 lines
1.1 KiB
C
29 lines
1.1 KiB
C
#ifndef _IQ81340_H_
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#define _IQ81340_H_
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#define IQ81340_PCE_BAR0 IOP13XX_PBI_LOWER_MEM_RA
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#define IQ81340_PCE_BAR1 (IQ81340_PCE_BAR0 + 0x02000000)
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#define IQ81340_FLASHBASE IQ81340_PCE_BAR0 /* Flash */
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#define IQ81340_PCE_BAR1_OFFSET(a) (IQ81340_PCE_BAR1 + (a))
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#define IQ81340_PRD_CODE IQ81340_PCE_BAR1_OFFSET(0)
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#define IQ81340_BRD_STEP IQ81340_PCE_BAR1_OFFSET(0x10000)
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#define IQ81340_CPLD_REV IQ81340_PCE_BAR1_OFFSET(0x20000)
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#define IQ81340_LED IQ81340_PCE_BAR1_OFFSET(0x30000)
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#define IQ81340_LHEX IQ81340_PCE_BAR1_OFFSET(0x40000)
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#define IQ81340_RHEX IQ81340_PCE_BAR1_OFFSET(0x50000)
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#define IQ81340_BUZZER IQ81340_PCE_BAR1_OFFSET(0x60000)
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#define IQ81340_32K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x70000)
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#define IQ81340_256K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x80000)
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#define IQ81340_ROTARY_SW IQ81340_PCE_BAR1_OFFSET(0xd0000)
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#define IQ81340_BATT_STAT IQ81340_PCE_BAR1_OFFSET(0xf0000)
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#define IQ81340_CMP_FLSH IQ81340_PCE_BAR1_OFFSET(0x1000000) /* 16MB */
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#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH)
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#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1)
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#endif /* _IQ81340_H_ */
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