Huacai Chen ef2f826c8f MIPS: Loongson-3: Enable the COP2 usage ... Loongson-3 has some specific instructions (MMI/SIMD) in coprocessor 2. COP2 isn't independent because it share COP1 (FPU)'s registers. This patch enable the COP2 usage so user-space programs can use the MMI/SIMD instructions. When COP2 exception happens, we enable both COP1 (FPU) and COP2, only in this way the fp context can be saved and restored correctly. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7189/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2014-07-30 21:47:17 +02:00
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common	MIPS: Add Loongson-3B support	2014-07-30 21:47:00 +02:00
fuloong-2e	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
lemote-2f	MIPS: Loongson: Modify ChipConfig register definition	2014-07-30 21:46:00 +02:00
loongson-3	MIPS: Loongson-3: Enable the COP2 usage	2014-07-30 21:47:17 +02:00
Kconfig	MIPS: Add NUMA support for Loongson-3	2014-07-30 21:46:19 +02:00
Makefile	MIPS: Loongson 3: Add IRQ init and dispatch support	2014-03-31 18:17:12 +02:00
Platform	MIPS: Loongson: Add Loongson-3 Kconfig options	2014-03-31 18:17:12 +02:00