Joerg Roedel e61aa46d0f x86/mm: Flush global TLB when switching to trampoline page-table ... [ Upstream commit 71d5049b053876afbde6c3273250b76935494ab2 ] Move the switching code into a function so that it can be re-used and add a global TLB flush. This makes sure that usage of memory which is not mapped in the trampoline page-table is reliably caught. Also move the clearing of CR4.PCIDE before the CR3 switch because the cr4_clear_bits() function will access data not mapped into the trampoline page-table. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211202153226.22946-4-joro@8bytes.org Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-01-27 10:54:14 +01:00
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rm	x86/realmode: Add SEV-ES specific trampoline entry point	2020-09-09 11:33:20 +02:00
init.c	x86/mm: Flush global TLB when switching to trampoline page-table	2022-01-27 10:54:14 +01:00
Makefile	x86, kcsan: Enable KCSAN for x86	2019-11-16 07:23:16 -08:00
rmpiggy.S	x86/asm/realmode: Use SYM_DATA_* instead of GLOBAL	2019-10-18 11:28:47 +02:00