0f4f0672ac
To add support for perf events and to allow the hardware counters to be shared with oprofile, we need a way to reserve access to the pmu (performance monitor unit). Platforms with PMU interrupts should register the interrupts in arch/arm/kernel/pmu.c Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
104 lines
2.2 KiB
C
104 lines
2.2 KiB
C
/*
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* linux/arch/arm/kernel/pmu.c
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*
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* Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/pmu.h>
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/*
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* Define the IRQs for the system. We could use something like a platform
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* device but that seems fairly heavyweight for this. Also, the performance
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* counters can't be removed or hotplugged.
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*
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* Ordering is important: init_pmu() will use the ordering to set the affinity
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* to the corresponding core. e.g. the first interrupt will go to cpu 0, the
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* second goes to cpu 1 etc.
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*/
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static const int irqs[] = {
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#if defined(CONFIG_ARCH_OMAP2)
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3,
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#elif defined(CONFIG_ARCH_BCMRING)
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IRQ_PMUIRQ,
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#elif defined(CONFIG_MACH_REALVIEW_EB)
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IRQ_EB11MP_PMU_CPU0,
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IRQ_EB11MP_PMU_CPU1,
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IRQ_EB11MP_PMU_CPU2,
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IRQ_EB11MP_PMU_CPU3,
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#elif defined(CONFIG_ARCH_OMAP3)
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INT_34XX_BENCH_MPU_EMUL,
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#elif defined(CONFIG_ARCH_IOP32X)
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IRQ_IOP32X_CORE_PMU,
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#elif defined(CONFIG_ARCH_IOP33X)
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IRQ_IOP33X_CORE_PMU,
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#elif defined(CONFIG_ARCH_PXA)
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IRQ_PMU,
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#endif
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};
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static const struct pmu_irqs pmu_irqs = {
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.irqs = irqs,
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.num_irqs = ARRAY_SIZE(irqs),
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};
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static volatile long pmu_lock;
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const struct pmu_irqs *
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reserve_pmu(void)
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{
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return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) :
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&pmu_irqs;
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}
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EXPORT_SYMBOL_GPL(reserve_pmu);
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int
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release_pmu(const struct pmu_irqs *irqs)
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{
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if (WARN_ON(irqs != &pmu_irqs))
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return -EINVAL;
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clear_bit_unlock(0, &pmu_lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(release_pmu);
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static int
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set_irq_affinity(int irq,
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unsigned int cpu)
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{
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#ifdef CONFIG_SMP
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int err = irq_set_affinity(irq, cpumask_of(cpu));
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if (err)
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pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
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irq, cpu);
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return err;
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#else
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return 0;
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#endif
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}
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int
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init_pmu(void)
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{
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int i, err = 0;
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for (i = 0; i < pmu_irqs.num_irqs; ++i) {
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err = set_irq_affinity(pmu_irqs.irqs[i], i);
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if (err)
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break;
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}
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return err;
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}
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EXPORT_SYMBOL_GPL(init_pmu);
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