ee2b805c8e
The definition of the SPI clock phase for the Motorola mode of the PL022 driver was incorrect: the spec had been interpreted as data being recieved on rising or falling edge of the clocks while the correct interpretation is that data can be recieved on the first or second edge transition, falling or rising depending on the polarity setting. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
125 lines
3.5 KiB
C
125 lines
3.5 KiB
C
/*
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* arch/arm/mach-u300/spi.c
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*
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* Copyright (C) 2009 ST-Ericsson AB
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* License terms: GNU General Public License (GPL) version 2
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*
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* Author: Linus Walleij <linus.walleij@stericsson.com>
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*/
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/spi/spi.h>
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#include <linux/amba/pl022.h>
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#include <linux/err.h>
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#include "padmux.h"
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/*
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* The following is for the actual devices on the SSP/SPI bus
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*/
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#ifdef CONFIG_MACH_U300_SPIDUMMY
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static void select_dummy_chip(u32 chipselect)
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{
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pr_debug("CORE: %s called with CS=0x%x (%s)\n",
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__func__,
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chipselect,
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chipselect ? "unselect chip" : "select chip");
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/*
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* Here you would write the chip select value to the GPIO pins if
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* this was a real chip (but this is a loopback dummy).
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*/
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}
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struct pl022_config_chip dummy_chip_info = {
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/* Nominally this is LOOPBACK_DISABLED, but this is our dummy chip! */
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.lbm = LOOPBACK_ENABLED,
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/*
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* available POLLING_TRANSFER and INTERRUPT_TRANSFER,
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* DMA_TRANSFER does not work
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*/
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.com_mode = INTERRUPT_TRANSFER,
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.iface = SSP_INTERFACE_MOTOROLA_SPI,
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/* We can only act as master but SSP_SLAVE is possible in theory */
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.hierarchy = SSP_MASTER,
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/* 0 = drive TX even as slave, 1 = do not drive TX as slave */
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.slave_tx_disable = 0,
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/* LSB first */
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.endian_tx = SSP_TX_LSB,
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.endian_rx = SSP_RX_LSB,
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.data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */
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.rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
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.tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
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.clk_phase = SSP_CLK_SECOND_EDGE,
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.clk_pol = SSP_CLK_POL_IDLE_LOW,
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.ctrl_len = SSP_BITS_12,
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.wait_state = SSP_MWIRE_WAIT_ZERO,
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.duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
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/*
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* This is where you insert a call to a function to enable CS
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* (usually GPIO) for a certain chip.
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*/
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.cs_control = select_dummy_chip,
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};
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#endif
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static struct spi_board_info u300_spi_devices[] = {
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#ifdef CONFIG_MACH_U300_SPIDUMMY
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{
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/* A dummy chip used for loopback tests */
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.modalias = "spi-dummy",
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/* Really dummy, pass in additional chip config here */
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.platform_data = NULL,
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/* This defines how the controller shall handle the device */
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.controller_data = &dummy_chip_info,
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/* .irq - no external IRQ routed from this device */
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.max_speed_hz = 1000000,
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.bus_num = 0, /* Only one bus on this chip */
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.chip_select = 0,
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/* Means SPI_CS_HIGH, change if e.g low CS */
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.mode = 0,
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},
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#endif
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};
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static struct pl022_ssp_controller ssp_platform_data = {
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/* If you have several SPI buses this varies, we have only bus 0 */
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.bus_id = 0,
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/* Set this to 1 when we think we got DMA working */
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.enable_dma = 0,
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/*
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* On the APP CPU GPIO 4, 5 and 6 are connected as generic
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* chip selects for SPI. (Same on U330, U335 and U365.)
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* TODO: make sure the GPIO driver can select these properly
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* and do padmuxing accordingly too.
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*/
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.num_chipselect = 3,
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};
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void __init u300_spi_init(struct amba_device *adev)
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{
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struct pmx *pmx;
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adev->dev.platform_data = &ssp_platform_data;
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/*
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* Setup padmuxing for SPI. Since this must always be
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* compiled into the kernel, pmx is never released.
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*/
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pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING);
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if (IS_ERR(pmx))
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dev_warn(&adev->dev, "Could not get padmux handle\n");
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else {
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int ret;
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ret = pmx_activate(&adev->dev, pmx);
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if (IS_ERR_VALUE(ret))
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dev_warn(&adev->dev, "Could not activate padmuxing\n");
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}
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}
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void __init u300_spi_register_board_devices(void)
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{
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/* Register any SPI devices */
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spi_register_board_info(u300_spi_devices, ARRAY_SIZE(u300_spi_devices));
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}
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