185aed7557
With the PMB enabled, only P1SEG and up are covered by the PMB mappings, meaning that situations where out-of-bounds physical addresses are read from will lead to TLB reset after the PMB miss, allowing for use cases like dd if=/dev/mem to reset the TLB. Fix this up to make sure the reference is between __MEMORY_START (phys) and __pa(high_memory). This is coherent across all variants of sh/sh64 with and without MMU, though the PMB bug itself is only applicable to SH-4A parts. Reported-by: Hideo Saito <saito@densan.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
40 lines
912 B
Plaintext
40 lines
912 B
Plaintext
#
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# Makefile for the Linux SuperH-specific parts of the memory manager.
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#
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obj-y := init.o extable_32.o consistent.o mmap.o
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ifndef CONFIG_CACHE_OFF
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cache-$(CONFIG_CPU_SH2) := cache-sh2.o
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cache-$(CONFIG_CPU_SH2A) := cache-sh2a.o
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cache-$(CONFIG_CPU_SH3) := cache-sh3.o
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cache-$(CONFIG_CPU_SH4) := cache-sh4.o
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cache-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
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endif
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obj-y += $(cache-y)
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mmu-y := tlb-nommu.o pg-nommu.o
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mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o
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obj-y += $(mmu-y)
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ifdef CONFIG_DEBUG_FS
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obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
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endif
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ifdef CONFIG_MMU
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obj-$(CONFIG_CPU_SH3) += tlb-sh3.o
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obj-$(CONFIG_CPU_SH4) += tlb-sh4.o
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ifndef CONFIG_CACHE_OFF
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obj-$(CONFIG_CPU_SH4) += pg-sh4.o
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obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
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endif
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endif
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_PMB) += pmb.o
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obj-$(CONFIG_NUMA) += numa.o
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EXTRA_CFLAGS += -Werror
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