9d59c17ab5
This patch is matched-up DMA platform device id to its clock id. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/* linux/arch/arm/mach-s5p64x0/dma.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <mach/regs-clock.h>
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#include <plat/devs.h>
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#include <plat/s3c-pl330-pdata.h>
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static u64 dma_dmamask = DMA_BIT_MASK(32);
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static struct resource s5p64x0_pdma_resource[] = {
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[0] = {
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.start = S5P64X0_PA_PDMA,
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.end = S5P64X0_PA_PDMA + SZ_4K,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_DMA0,
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.end = IRQ_DMA0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
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.peri = {
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[0] = DMACH_UART0_RX,
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[1] = DMACH_UART0_TX,
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[2] = DMACH_UART1_RX,
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[3] = DMACH_UART1_TX,
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[4] = DMACH_UART2_RX,
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[5] = DMACH_UART2_TX,
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[6] = DMACH_UART3_RX,
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[7] = DMACH_UART3_TX,
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[8] = DMACH_MAX,
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[9] = DMACH_MAX,
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[10] = DMACH_PCM0_TX,
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[11] = DMACH_PCM0_RX,
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[12] = DMACH_I2S0_TX,
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[13] = DMACH_I2S0_RX,
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[14] = DMACH_SPI0_TX,
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[15] = DMACH_SPI0_RX,
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[16] = DMACH_MAX,
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[17] = DMACH_MAX,
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[18] = DMACH_MAX,
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[19] = DMACH_MAX,
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[20] = DMACH_SPI1_TX,
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[21] = DMACH_SPI1_RX,
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[22] = DMACH_MAX,
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[23] = DMACH_MAX,
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[24] = DMACH_MAX,
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[25] = DMACH_MAX,
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[26] = DMACH_MAX,
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[27] = DMACH_MAX,
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[28] = DMACH_MAX,
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[29] = DMACH_PWM,
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[30] = DMACH_MAX,
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[31] = DMACH_MAX,
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},
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};
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static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
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.peri = {
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[0] = DMACH_UART0_RX,
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[1] = DMACH_UART0_TX,
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[2] = DMACH_UART1_RX,
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[3] = DMACH_UART1_TX,
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[4] = DMACH_UART2_RX,
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[5] = DMACH_UART2_TX,
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[6] = DMACH_UART3_RX,
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[7] = DMACH_UART3_TX,
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[8] = DMACH_UART4_RX,
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[9] = DMACH_UART4_TX,
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[10] = DMACH_PCM0_TX,
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[11] = DMACH_PCM0_RX,
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[12] = DMACH_I2S0_TX,
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[13] = DMACH_I2S0_RX,
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[14] = DMACH_SPI0_TX,
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[15] = DMACH_SPI0_RX,
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[16] = DMACH_PCM1_TX,
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[17] = DMACH_PCM1_RX,
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[18] = DMACH_PCM2_TX,
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[19] = DMACH_PCM2_RX,
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[20] = DMACH_SPI1_TX,
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[21] = DMACH_SPI1_RX,
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[22] = DMACH_USI_TX,
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[23] = DMACH_USI_RX,
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[24] = DMACH_MAX,
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[25] = DMACH_I2S1_TX,
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[26] = DMACH_I2S1_RX,
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[27] = DMACH_I2S2_TX,
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[28] = DMACH_I2S2_RX,
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[29] = DMACH_PWM,
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[30] = DMACH_UART5_RX,
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[31] = DMACH_UART5_TX,
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},
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};
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static struct platform_device s5p64x0_device_pdma = {
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.name = "s3c-pl330",
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.id = -1,
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.num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
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.resource = s5p64x0_pdma_resource,
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.dev = {
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.dma_mask = &dma_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static int __init s5p64x0_dma_init(void)
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{
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unsigned int id;
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id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
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if (id == 0x50000)
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s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
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else
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s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
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platform_device_register(&s5p64x0_device_pdma);
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return 0;
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}
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arch_initcall(s5p64x0_dma_init);
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