Commit Graph

42942 Commits

Author SHA1 Message Date
Daniel Mack
31436bbe8f [ARM] pxa/raumfeld: set GPIO drive bits for LED pins
Set GPIO bits to pull the pins connected to LEDs for lower power mode.
We want all LEDs off when devices are in suspend.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:59 +08:00
Marc Zyngier
438a22fe26 [ARM] pxa/zeus: Add support for mcp2515 CAN bus
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:59 +08:00
Marc Zyngier
fcfdc67ff2 [ARM] pxa/zeus: Add support for onboard max6369 watchdog
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:59 +08:00
Marc Zyngier
90ac0dfd9f [ARM] pxa/zeus: Add Eurotech as the manufacturer
Signed-off-by: Amit Walambe <amit.walambe@eurotech.com>
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:59 +08:00
Marc Zyngier
7ff27dfa6e [ARM] pxa/zeus: Correct the USB host initialisation flags
Signed-off-by: Amit Walambe <amit.walambe@eurotech.com>
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:58 +08:00
Marc Zyngier
662b0836a6 [ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
Zeus console port is wired to a 8250-compatible device (pxa UARTs are
reserved to other uses). This patch allows such a configuration in the
uncompress sequence.

Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:58 +08:00
Eric Miao
c95efee133 [ARM] pxa: refactor uncompress.h for non-PXA uarts
The original patch came from Marc Zyngier where support of 8250-compatible
UART is required to show the uncompress information. Modified a little bit
here, including changes below:

1. #include <mach/regs-uart.h> is actually not necessary
2. introduced uart_{read,write}() for different base and shift
3. introduced uart_is_enabled() and assumed enabled always for
   non-PXA uarts

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Marc Zyngier <maz@misterjones.org>
2010-03-02 07:40:58 +08:00
Eric Miao
2029e5643a [ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
The irq_chip is not yet registered, so no default irq_chip.mask_ack(),
which we have to handle it correctly manually here.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:57 +08:00
Haojian Zhuang
df0c382436 [ARM] mmp2: add handling on PMIC IRQ
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs
to be cleared after PMIC IRQ occured. Now append the clear operation in
irq chip handler.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:57 +08:00
Haojian Zhuang
ce0ac42359 [ARM] mmp2: add support for board IRQs
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:57 +08:00
Haojian Zhuang
0913b86ff7 [ARM] mmp2: add missing ICU register definitions
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:57 +08:00
Haojian Zhuang
16144bfb83 [ARM] mmp2: add gpio initialization
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:56 +08:00
Haojian Zhuang
247b4592f3 [ARM] mmp2: add mfpr setting
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:56 +08:00
Haojian Zhuang
4e3b4da98e [ARM] mmp2: add mask function in irq-mmp2.c
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:56 +08:00
Haojian Zhuang
e1cb7db2ef [ARM] mmp: support jasper development board
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:55 +08:00
Haojian Zhuang
ccffb1ad1f [ARM] mmp: add default configuration for MMP2
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:55 +08:00
Haojian Zhuang
2f7e8faef5 [ARM] mmp: add support for Marvell MMP2
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's
ARMv6 compatible.  Support basic interrupt handler and timer,
and basic support for MMP2 based FLINT platform.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:55 +08:00
Eric Miao
978da5bcdb [ARM] mmp: rename irq.c to irq-pxa168.c to allow other SoC IRQ chips
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:54 +08:00
Haojian Zhuang
e6dac5e1b6 [ARM] mmp: update pxa168_defconfig and include avengers lite support
Signed-off-by: Gavin Gu <gavin.gu@marvell.com>
Signed-off-by: Jing Xiang <jxiang@marvell.com>
Signed-off-by: Jack Ren <jack.ren@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:54 +08:00
Haojian Zhuang
9896de72d2 [ARM] mmp: avengers lite (pxa168) board bring up
Signed-off-by: Gavin Gu <gavin.gu@marvell.com>
Signed-off-by: Jing Xiang <jxiang@marvell.com>
Signed-off-by: Jack Ren <jack.ren@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:53 +08:00
Stefan Schmidt
0925e2f0fc [ARM] pxa/imote2: Remove redundant pin entry for nCS.
Also remove a trailing whitespace while being there.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:53 +08:00
Stefan Schmidt
d496936f95 [ARM] pxa/imote2: Add defconfig for the imote2 platform.
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:53 +08:00
Eric Miao
a056bef455 [ARM] pxa: introduce PXA_SSP_LEGACY for legacy SSP API
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:52 +08:00
Stefan Schmidt
98acdbe4cf [ARM] pxa: define zeus_power_off() only when CONFIG_PM enabled
Add some safety check for CONFIG_PM around zeus_power_off(). Without
it linking can fail like this:

arch/arm/mach-pxa/built-in.o: In function `zeus_power_off':
e800.c:(.text+0x2bc8): undefined reference to `pxa27x_cpu_suspend'

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:52 +08:00
Stefan Schmidt
cfab57e0e4 [ARM] pxa: enable check_scoop_reg() only if CONFIG_PM is set.
This function gets only called from scoop_suspend() and scoop_resume() which are
only built in if we have CONFIG_PM set. Make it the same for check_scoop_reg().

This fixes the following warning:
arch/arm/common/scoop.c:143: warning: ‘check_scoop_reg’ defined but not used

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:52 +08:00
Edwin Peer
1f3b536be7 [ARM] pxa: add support for Embedian MXM-8x10
Signed-off-by: Edwin Peer <epeer@tmtservices.co.za>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:51 +08:00
Eric Miao
0dc726bb26 [ARM] pxa: move board board IRQ definitions out of irqs.h
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:51 +08:00
Eric Miao
19851c58e6 [ARM] sa1111: allow cascaded IRQs to be used by platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:51 +08:00
Eric Miao
ac609d266e [ARM] locomo: allow cascaded IRQ base to be specified by platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:50 +08:00
Eric Miao
00dd8027b9 [ARM] locomo: remove unused IRQs and avoid unnecessary cascade
IRQ_LOCOMO_* are never used elsewhere, remove these definitions. As well
as the cascade of these IRQs. IRQ_LOCOMO_*_BASE changed to IRQ_LOCOMO_*.

IRQ_LOCOMO_LT and IRQ_LOCOMO_SPI are likely to be used in a same way as
IRQ_LOCOMO_KEY.

IRQ_LOCOMO_GPIO and the demultiplex handler should really be living
somewhere else.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:49 +08:00
Eric Miao
da8065ac3e [ARM] locomo: avoid unnecessary cascaded keyboard IRQ
It is not necessary and is over-complicated for IRQ_LOCOMO_KEY to
be a cascaded IRQ of IRQ_LOCOMO_KEY_BASE. Removed and introduced
locomokbd_{open,close} for masking/unmasking of the keyboard IRQ.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:49 +08:00
Eric Miao
efe7f8bda0 [ARM] sa1100: remove unreferenced IRQ definitions
These IRQ definitions related to LOCOMO are never referenced anywhere,
thus could be safely removed.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:49 +08:00
Eric Miao
f69a6548c9 [ARM] pxa/tosa: make use of the matrix keypad driver
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:48 +08:00
Eric Miao
96f6a13a6d [ARM] pxa/cm-x270: avoid direct access of GPIO/MFP registers
Cc: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:48 +08:00
Eric Miao
c11b6a420b [ARM] pxa: add the missing AC97 pin configurations
Missing AC97 pin configurations are added where pxa_set_ac97_info() are
called for all pxa25x/pxa27x platforms. Where no exact configuration is
provided, use the default as in sound/arm/pxa2xx-ac97-lib.c

Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:48 +08:00
Eric Miao
fb1bf8cd13 [ARM] pxa: introduce processor specific pxa27x_assert_ac97reset()
This is really pxa27x specific and should be kept in pxa27x.c. With this
newly introduced function, the original set_resetgpio_mode() is deprecated.

Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:47 +08:00
Eric Miao
bedbda9717 [ARM] pxa: simplify the LCD pin configuration for pxa27x platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:47 +08:00
Eric Miao
07bae6c321 [ARM] pxa: simplify the LCD pin configuration for pxa25x platforms
There are only limited possible LCD pin configurations for pxa25x
platforms, simplify this by macro.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:46 +08:00
Eric Miao
669cb51c6a [ARM] pxa: use chip->ack() instead of accessing GEDR directly
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:45 +08:00
Russell King
2a2d10f386 Merge branch 'for-rmk' of git://git.marvell.com/orion into devel-stable 2010-02-25 20:41:34 +00:00
Sebastien Requiem
c499546f43 [ARM] MV78xx0: Support for Buffalo WXL (Terastation Duo)
* Modification of Kconfig to add the Option
* 1 new file : buffalo-wxl-setup.c
This file is inspired from the db-78xx0-setup.c already present.
The following is done:
  - Configure MPP Lines for the plateform (see my patch for MPP)
This is taken from the stock kernel provided by buffalotech (the vendor)
  - GigaBit Ethernet
  - Sata
  - Uart are initiallized in a different way than on the dev board as we
have one core only.
  - USB

The kernel has been running for some days now on my plateform.

Signed-off-by: Sebastien Requiem <sebastien@kolios.dk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-02-23 17:10:08 -05:00
Sebastien Requiem
ee40ceab23 [ARM] MV78XX0: MPP routines and definitions
This patch is composed of two new files :

- mpp.c which is mainly inspired by the same file as in mach-kirkwood

- mpp.h that is written from the documentation provided by Marvell
http://www.marvell.com/products/processors/embedded/discovery_innovation/HW_MV78100_OpenSource.pdf

Moreover, due to some implementation problem, I have
defined some MPPX_UNUSED that offer developers the possibility
to SET MPP to some unused value (such as for Buffalo WXL).

Note: This patch doesn't support MV78200 yet (only 78100 MPP lines have
been written)

Signed-off-by: Sebastien Requiem <sebastien@kolios.dk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-02-23 16:44:01 -05:00
John Holland
d5b5746bed [ARM] eSATA SheevaPlug: correlate MPP to SD CD and SD WP
Accept SD CD and SD WP in accordance to
http://plugcomputer.org/data/docs/Sheeva-PowerPlug-V1.3-GTI-090906.pdf
on MPP 47 and 44 respectively on the eSATA SheevaPlug

Signed-off-by: John Holland <john.holland@cellent-fs.de>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
--
2010-02-23 16:44:01 -05:00
John Holland
d7b222d708 [ARM] eSATA SheevaPlug: configure SoC SATA interface
Enable the kirkwood SATA SoC interface on the eSATA SheevaPlug.

Signed-off-by: John Holland <john.holland@cellent-fs.de>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
--
2010-02-23 16:44:01 -05:00
John Holland
d8ecb34900 [ARM] eSATA SheevaPlug basic board support
Allow basic eSATA SheevaPlug board configuration and build.

Signed-off-by: John Holland <john.holland@cellent-fs.de>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
--
2010-02-23 16:44:00 -05:00
Russell King
0fa11802e0 ARM: Update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-20 14:17:16 +00:00
Abdoulaye Walsimou Gaye
1c8e170aaa ARM: 5950/1: ARM: Fix build error for arm1026ej-s processor
This patch fix the below build error for arm1026ej-s processor (IntegratorCP/arm1026ej-s board).
  CC      init/main.o
In file included from include/linux/highmem.h:8,
                 from include/linux/pagemap.h:10,
                 from include/linux/mempolicy.h:62,
                 from init/main.c:52:
arch/arm/include/asm/cacheflush.h:134:2: error: #error Unknown cache maintainence model
make[1]: *** [init/main.o] Erreur 1
make: *** [init] Erreur 2

Signed-off-by: Abdoulaye Walsimou Gaye <walsimou@walsimou.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-20 14:10:47 +00:00
Russell King
2b4f017579 Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainline 2010-02-18 23:35:24 +00:00
Roel Kluin
079e1091a2 Gemini: wrong registers used to set reg_level in gpio_set_irq_type()
It appears the wrong GPIO registers were used

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@gmail.com>
2010-02-18 21:54:11 +02:00
Santosh Shilimkar
6c09f09d44 ARM: 5938/1: ARM: L2: export outer_cache_fns
The 'outer_cache' variable is needed by the outer_inv_range(),
outer_clean_range() and outer_flush_range() functions, which are
declared as inline in asm/cacheflush.h.  Otherwise drivers built
as a loadable module, which access these functions, will have
an undefined symbol.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-18 16:27:39 +00:00