forked from luck/tmp_suning_uos_patched
08ee77b5a5
According to the LPC32x0 User Manual [1]: For both PWM1 and PWM2 Control Registers: BIT 31: This bit gates the PWM_CLK signal and enables the external output pin to the PWM_PIN_STATE logical level. 0 = PWM disabled. (Default) 1 = PWM enabled So in lpc32xx_pwm_enable(), we should set PWM_ENABLE bit. In lpc32xx_pwm_disable(), we should just clear PWM_ENABLE bit rather than write 0 to the register which will also clear PWMx_RELOADV and PWMx_DUTY bits. [1] http://www.nxp.com/documents/user_manual/UM10326.pdf Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> |
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| .. | ||
| core.c | ||
| Kconfig | ||
| Makefile | ||
| pwm-ab8500.c | ||
| pwm-atmel-tcb.c | ||
| pwm-bfin.c | ||
| pwm-imx.c | ||
| pwm-jz4740.c | ||
| pwm-lpc32xx.c | ||
| pwm-mxs.c | ||
| pwm-puv3.c | ||
| pwm-pxa.c | ||
| pwm-samsung.c | ||
| pwm-spear.c | ||
| pwm-tegra.c | ||
| pwm-tiecap.c | ||
| pwm-tiehrpwm.c | ||
| pwm-tipwmss.c | ||
| pwm-tipwmss.h | ||
| pwm-twl-led.c | ||
| pwm-twl.c | ||
| pwm-vt8500.c | ||