087b5f3277
The lower 2 bits of the opcode must be 0x3. If the lower 2 bits are 0-2, it's a compressed instruction. Merge 3 slightly different error messages into 1 to reduce code. The messages differed slightly depending on whether we parsed a string or an expression. The message gets a little more generic, but is no more generic than what binutils prints. |
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|---|---|---|
| .. | ||
| AArch64 | ||
| AMDGPU | ||
| ARM | ||
| AsmParser | ||
| AVR | ||
| BPF | ||
| COFF | ||
| CSKY | ||
| Disassembler | ||
| ELF | ||
| GOFF | ||
| Hexagon | ||
| Lanai | ||
| LoongArch | ||
| M68k | ||
| MachO | ||
| Mips | ||
| MSP430 | ||
| PowerPC | ||
| RISCV | ||
| Sparc | ||
| SystemZ | ||
| VE | ||
| WebAssembly | ||
| X86 | ||
| XCOFF | ||
| Xtensa | ||