llvm-project/llvm/test/MC/X86
Wang, Xin10 4dd5e9c60e [X86][MC]Fix wrong action for encode movdir64b
Movdir64b is special for its mem operand, 67 prefex can not only modify its add size,
so it's mem base and index reg should be the same type as source reg, such as
movdir64b (%rdx), rcx, and could not be movdir64b (%edx), rcx.
Now llvm-mc can encode the asm 'movdir64b (%edx), rcx' but the result is the same as
'movdir64b (%edx), ecx', which offend users' intention, while gcc will object this
action and give a warning.
I add 3 new mem descriptions to let llvm-mc to report the same error.

Reviewed By: skan, craig.topper

Differential Revision: https://reviews.llvm.org/D145893
2023-03-17 03:30:16 -04:00
..
AlignedBundling [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
AMX [X86] Add AMX-FP16 instructions. 2022-10-22 08:05:22 +08:00
Inputs
KEYLOCKER
3DNow.s
2011-09-06-NoNewline.s
abs8.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
addr16-32.s
address-size.s
AES-32.s
AES-64.s
align-branch-32bit.s
align-branch-align.s
align-branch-basic.s
align-branch-boundary-default.s
align-branch-bundle.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
align-branch-enhanced-relaxation.s
align-branch-fused.s
align-branch-general.s
align-branch-hardcode.s
align-branch-mixed.s
align-branch-necessary.s
align-branch-negative.s
align-branch-pad-max-prefix.s
align-branch-prefix.s
align-branch-relax-all.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
align-branch-section-size.s
align-branch-section-type.s
align-branch-single.s
align-branch-system.s
align-branch-variant-symbol.s
align-via-padding-corner.s
align-via-padding.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
align-via-relaxation.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
avx_ne_convert-32-att.s [X86] Add AVX-NE-CONVERT instructions. 2022-10-31 23:39:38 +08:00
avx_ne_convert-32-intel.s [X86] Add AVX-NE-CONVERT instructions. 2022-10-31 23:39:38 +08:00
avx_ne_convert-64-att.s [X86] Add AVX-NE-CONVERT instructions. 2022-10-31 23:39:38 +08:00
avx_ne_convert-64-intel.s [X86] Add AVX-NE-CONVERT instructions. 2022-10-31 23:39:38 +08:00
avx_vaes-encoding.s
avx_vnni_int8-32-att.s [X86] Add AVX-VNNI-INT8 instructions. 2022-10-28 10:39:54 +08:00
avx_vnni_int8-32-intel.s [X86] Add AVX-VNNI-INT8 instructions. 2022-10-28 10:39:54 +08:00
avx_vnni_int8-64-att.s [X86] Add AVX-VNNI-INT8 instructions. 2022-10-28 10:39:54 +08:00
avx_vnni_int8-64-intel.s [X86] Add AVX-VNNI-INT8 instructions. 2022-10-28 10:39:54 +08:00
avx_vnni-encoding.s
AVX-32.s
AVX-64.s
avx-ifma-att-32.s [X86] Add AVX-IFMA instructions. 2022-10-28 09:42:30 +08:00
avx-ifma-att-64.s [X86] Add AVX-IFMA instructions. 2022-10-28 09:42:30 +08:00
avx-ifma-intel-32.s [X86] Add AVX-IFMA instructions. 2022-10-28 09:42:30 +08:00
avx-ifma-intel-64.s [X86] Add AVX-IFMA instructions. 2022-10-28 09:42:30 +08:00
AVX2-32.s
AVX2-64.s
avx512_bf16_vl-encoding.s
avx512_bf16-encoding.s
avx512-encodings.s
avx512-err.s
avx512bitalg-encoding.s
avx512bw-encoding.s
AVX512F_512-32.s
AVX512F_512-64.s
AVX512F_SCALAR-32.s
AVX512F_SCALAR-64.s
avx512fp16-complex-fma_vl.s
avx512fp16-complex-fma.s
avx512fp16.s
avx512fp16vl.s
avx512gfni-encoding.s
avx512ifma-encoding.s
avx512ifmavl-encoding.s
avx512vaes-encoding.s
avx512vbmi-encoding.s
avx512vbmi2-encoding.s
avx512vbmi2vl-encoding.s
avx512vl_bitalg-encoding.s
avx512vl_gfni-encoding.s
avx512vl_vaes-encoding.s
avx512vl_vnni-encoding.s
avx512vl-encoding.s
avx512vlvpclmul.s
avx512vnni-encoding.s
avx512vp2intersectvl-att.s
avx512vp2intersectvl-intel.s
avx512vpclmul.s
avx5124fmaps-encoding.s
avx5124vnniw-encoding.s
AVXAES-32.s
AVXAES-64.s
BMI1-32.s
BMI1-64.s
BMI2-32.s
BMI2-64.s
CET-32.s
CET-64.s
cet-encoding.s
cfi_offset-eip.s
check-end-of-data-region.s
CLFLUSHOPT-32.s
CLFLUSHOPT-64.s
CLFSH-32.s
CLFSH-64.s
CLWB-32.s
CLWB-64.s
CLZERO-32.s
CLZERO-64.s
cmpccxadd-att-64-alias.s [X86] Add CMPCCXADD instructions. 2022-10-25 14:33:39 +08:00
cmpccxadd-att-64.s [X86] Add CMPCCXADD instructions. 2022-10-25 14:33:39 +08:00
cmpccxadd-intel-64-alias.s [X86] Add CMPCCXADD instructions. 2022-10-25 14:33:39 +08:00
cmpccxadd-intel-64.s [X86] Add CMPCCXADD instructions. 2022-10-25 14:33:39 +08:00
code16-32-64.s
code16gcc-align.s
code16gcc.s
compact-unwind-cfi_def_cfa.s
compact-unwind-mode-dwarf.s
compact-unwind.s
crlf.test
data-prefix-fail.s
data-prefix16.s
data-prefix32.s
data-prefix64.s
directive-arch.s
disassemble-zeroes.s
dwarf-segment-register.s [X86] Add DwarfRegNums for segment registers 2023-02-28 17:09:33 +00:00
dwarf-size-field-overflow.test
encoder-fail.s
error-reloc.s
eval-fill.s
F16C-32.s
F16C-64.s
faultmap-section-parsing.s
fixup-cpu-mode.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
FMA-32.s
FMA-64.s
fp-setup-macho.s
FXSAVE-32.s
FXSAVE-64.s
FXSAVE64-64.s
gather.s
gfni-encoding.s
gnux32-dwarf-gen.s
gotpcrel_norelax.s
gotpcrelx.s
hex-immediates.s
I86-32.s
I86-64.s
I186-32.s
I186-64.s
I286-32.s
I286-64.s
I386-32.s
I386-64.s
i386-darwin-frame-register.ll
I486-32.s
I486-64.s
imm-comments.s
index-operations.s [X86][MC]Fix wrong action for encode movdir64b 2023-03-17 03:30:16 -04:00
inline-asm-obj.ll
intel-syntax-2.s
intel-syntax-32.s
intel-syntax-ambiguous.s
intel-syntax-avx_vnni.s
intel-syntax-avx512_bf16_vl.s
intel-syntax-avx512_bf16.s
intel-syntax-avx512-error.s
intel-syntax-avx512.s
intel-syntax-avx512fp16.s
intel-syntax-avx512fp16vl.s
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s
intel-syntax-error.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-print.ll
intel-syntax-ptr-sized.s
intel-syntax-unsized-memory.s
intel-syntax-var-offset.ll MC: Convert tests to opaque pointers 2022-11-27 20:10:29 -08:00
intel-syntax-x86-64-avx_vnni.s
intel-syntax-x86-64-avx.s
intel-syntax-x86-64-avx512_bf16_vl.s
intel-syntax-x86-64-avx512_bf16.s
intel-syntax-x86-64-avx512f_vl.s
intel-syntax-x86-avx512dq_vl.s
intel-syntax-x86-avx512vbmi_vl.s
intel-syntax.s
invalid_opcode.s
invalid-sleb.s
INVPCID-32.s
INVPCID-64.s
large-bss.s
line-table-sections.s
lit.local.cfg
LWP-32.s
LWP-64.s
lwp-x86_64.s
lwp.s
macho-reloc-errors-x86_64.s
macho-reloc-errors-x86.s
macho-uleb.s
maskmovdqu.s
maskmovdqu64.s
MMX-32.s Fix some test files with executable permissions 2022-12-02 17:12:03 -05:00
MMX-64.s
no-elf-compact-unwind.s
pad-for-align-debug.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
padlock.s
PKU-32.s
PKU-64.s
pltoff.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
POPCNT-32.s
POPCNT-64.s
PPRO-32.s
PPRO-64.s
pr22004.s
pr22028.s
pr27884.s
pr28547.s
pr32530.s
pr37425.s
PREFETCH-32.s
PREFETCH-64.s [X86][1/2] Support PREFETCHI instructions 2022-10-20 08:46:01 +08:00
prefetchit-non-rip-op.s Make prefetchit{0/1} emit an assembler warning if the operand is not rip-rel 2023-02-01 01:26:06 -06:00
prefix-padding-32.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
prefix-padding-64.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
rao-int-att.s [X86][1/2] SUPPORT RAO-INT 2022-10-27 17:20:07 +08:00
rao-int-intel.s [X86][1/2] SUPPORT RAO-INT 2022-10-27 17:20:07 +08:00
RDPMC-32.s
RDPMC-64.s
RDPRU.s
RDRAND-32.s
RDRAND-64.s
RDSEED-32.s
RDSEED-64.s
RDTSCP-32.s
RDTSCP-64.s
RDWRFSGS-64.s
relax-insn.s
relax-offset.s
reloc-directive-elf-32.s
reloc-directive-elf-64.s
reloc-directive.s
reloc-macho.s
reloc-undef-global.s
ret.s
RTM.s
segment-prefix.s
SHA-32.s
SHA-64.s
shuffle-comments.s
signed-coff-pcrel.s
SNP-32.s [X86] Add RMPQUERY to SNP instructions 2023-02-06 10:46:34 +05:30
SNP-64.s [X86] Add RMPQUERY to SNP instructions 2023-02-06 10:46:34 +05:30
space-err.s
SSE_PREFETCH-32.s
SSE_PREFETCH-64.s
SSE-32.s
SSE-64.s
SSE2-32.s
SSE2-64.s
SSE3-32.s
SSE3-64.s
SSE4a-32.s
SSE4a-64.s
SSE41-32.s
SSE41-64.s
SSE42-32.s
SSE42-64.s
SSEMXCSR-32.s
SSEMXCSR-64.s
SSSE3-32.s
SSSE3-64.s
stackmap-nops.ll
stdcall.s
SVM-32.s
SVM-64.s
tlsdesc-32.s
tlsdesc-64.s
tlsdesc-x32.s [llvm-objdump] Add --no-print-imm-hex to tests depending on it. 2022-10-29 15:40:26 -07:00
unused_reg_var_assign.s
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
VMFUNC-32.s
VMFUNC-64.s
vpclmulqdq.s
VTX-32.s
VTX-64.s
wrmsrns.s [X86] Add WRMSRNS instructions. 2022-10-19 13:04:11 +08:00
x86_64-asm-match.s [AsmParser] Match mandatory operands following optional operands. 2022-11-10 12:48:11 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-directive-nops.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
X86_64-pku.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
x86_long_nop.s [X86] AMD Zen 4 Initial enablement 2022-12-17 16:15:22 +05:30
x86_nop.s
x86_operands.s
x86-16.s
x86-32-avx.s
x86-32-avx512_vp2intersect-intel.s
x86-32-avx512vp2intersect-att.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s
x86-64-avx_vnni-encoding.s
x86-64-avx512_bf16_vl-encoding.s
x86-64-avx512_bf16-encoding.s
x86-64-avx512_vp2intersect-intel.s
x86-64-avx512bw_vl.s
x86-64-avx512bw.s
x86-64-avx512cd_vl.s
x86-64-avx512cd.s
x86-64-avx512dq_vl.s
x86-64-avx512dq.s
x86-64-avx512f_vl.s
x86-64-avx512pf.s
x86-64-avx512vp2intersect-att.s
x86-64-avx512vp2intersectvl-att.s
x86-64-avx512vp2intersectvl-intel.s
x86-64-avx512vpopcntdq.s
x86-64-msrlist.s
x86-64-rao-int-att.s [X86][1/2] SUPPORT RAO-INT 2022-10-27 17:20:07 +08:00
x86-64-rao-int-intel.s [X86][1/2] SUPPORT RAO-INT 2022-10-27 17:20:07 +08:00
x86-64.s
x86-branch-relaxation.s
x86-directive-nops-errors.s
x86-directive-nops.s
x86-evenDirective.s
x86-GCC-inline-asm-Y-constraints.ll Correct typos (NFC) 2022-12-16 10:51:26 -08:00
x86-itanium.ll
x86-jcxz-loop-fixup.s
x86-target-directives.s
x86-windows-itanium-libcalls.ll
X87-32.s Fix some test files with executable permissions 2022-12-02 17:12:03 -05:00
X87-64.s Fix some test files with executable permissions 2022-12-02 17:12:03 -05:00
XOP-32.s
XOP-64.s
XSAVE-32.s
XSAVE-64.s
XSAVEC-32.s
XSAVEC-64.s
XSAVEOPT-32.s
XSAVEOPT-64.s
XSAVES-32.s
XSAVES-64.s