Thierry Reding 0f1bc12e9e clk: tegra: Allow PLLE training to succeed ... Under some circumstances the PLLE needs to be retrained, in which case access to the PMC registers is required. Fix this by passing a pointer to the PMC registers instead of NULL when registering the PLLE clock. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-04-01 11:44:38 -07:00
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mmp
mvebu	cpufreq: kirkwood: Add a cpufreq driver for Marvell Kirkwood SoCs	2013-02-09 12:56:08 +01:00
mxs	arm-soc: soc-specific updates	2013-02-21 15:27:22 -08:00
socfpga
spear
tegra	clk: tegra: Allow PLLE training to succeed	2013-04-01 11:44:38 -07:00
ux500
versatile	arm-soc: driver specific changes	2013-02-21 15:12:18 -08:00
x86	clk: x86: add support for Lynxpoint LPSS clocks	2013-01-23 21:14:22 +01:00
clk-bcm2835.c	clk: bcm2835: probe for fixed-clock in device tree	2013-01-14 21:46:59 -07:00
clk-devres.c
clk-divider.c	clk-divider: fix macros	2013-01-18 09:44:02 -08:00
clk-fixed-factor.c	clk: fixed-factor: round_rate should use do_div	2013-01-11 18:43:27 -08:00
clk-fixed-rate.c	clk: add common of_clk_init() function	2013-01-24 11:09:28 -08:00
clk-gate.c
clk-highbank.c	ACPI and power management updates for 3.9-rc1	2013-02-20 11:26:56 -08:00
clk-ls1x.c
clk-max77686.c	clk: max77686: Avoid double free at remove time	2013-01-15 16:16:26 -08:00
clk-mux.c
clk-nomadik.c
clk-prima2.c	clk: prima2: enable dt-binding clkdev mapping	2013-01-18 09:44:01 -08:00
clk-twl6040.c
clk-u300.c
clk-vt8500.c	clk: vt8500: Fix "fix device clock divisor calculations"	2013-03-14 22:34:26 +01:00
clk-wm831x.c
clk-zynq.c	clk: zynq: Use common of_clk_init() function	2013-01-24 11:12:58 -08:00
clk.c	hlist: drop the node parameter from iterators	2013-02-27 19:10:24 -08:00
clkdev.c
Kconfig
Makefile	arm-soc: soc-specific updates	2013-02-21 15:27:22 -08:00