tmp_suning_uos_patched/arch/c6x
Mark Salter 9de98fb4ec C6X: DSCR - Device State Configuration Registers
All SoCs provide an area of device configuration registers called the DSCR. The
location of specific registers as well as their use varies considerably from
implementation to implementation. Rather than having to rely on additional
SoC-specific DSCR code for each new supported SoC, this code generalize things
as much as possible using device tree properties. Initialization must take
place early on (setup_arch time) in case the event timer device needs to be
enable via the DSCR.

Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-10-06 19:48:36 -04:00
..
boot C6X: devicetree support 2011-10-06 19:47:33 -04:00
configs C6X: build infrastructure 2011-10-06 19:47:25 -04:00
include/asm C6X: DSCR - Device State Configuration Registers 2011-10-06 19:48:36 -04:00
kernel C6X: general SoC support 2011-10-06 19:48:26 -04:00
lib C6X: library code 2011-10-06 19:48:23 -04:00
mm C6X: memory management and DMA support 2011-10-06 19:47:37 -04:00
platforms C6X: DSCR - Device State Configuration Registers 2011-10-06 19:48:36 -04:00
Kconfig C6X: build infrastructure 2011-10-06 19:47:25 -04:00
Makefile C6X: build infrastructure 2011-10-06 19:47:25 -04:00