9de98fb4ec
All SoCs provide an area of device configuration registers called the DSCR. The location of specific registers as well as their use varies considerably from implementation to implementation. Rather than having to rely on additional SoC-specific DSCR code for each new supported SoC, this code generalize things as much as possible using device tree properties. Initialization must take place early on (setup_arch time) in case the event timer device needs to be enable via the DSCR. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> |
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cache.c | ||
dscr.c | ||
emif.c | ||
Kconfig | ||
Makefile | ||
megamod-pic.c | ||
platform.c | ||
pll.c | ||
plldata.c | ||
timer64.c |