Commit Graph

11975 Commits

Author SHA1 Message Date
Jon Hunter
a36795c127 OMAP: clock: fix configuration of J-Type DPLLs to work for OMAP3 and OMAP4
J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.

The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.

For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.

In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.

Tested on OMAP36xx Zoom3 and OMAP4 Blaze.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: removed explicit inlining and added '_' prefix on lookup_*()
 functions; added testing info to commit message; added 35xx comments back in]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:31:43 -07:00
Charulatha V
b183aaf727 OMAP3: clock: Update clock domain name for mcspi fck
Update clock3xxx_data for mcspi1-4 with appropriate clock domain name.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:31:43 -07:00
Benoit Cousson
7cffa6b888 OMAP4: hwmod data: Add SIDLE_SMART_WKUP modes to several IPs
uart, gpio, wd_timer and i2c does support the new smart-idle with wakeup
added in OMAP4.

Add the flag to allow the hwmod core to enable this mode when applicable.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:31:28 -07:00
Benoit Cousson
86009eb326 OMAP2+: hwmod: Add wakeup support for new OMAP4 IPs
The new OMAP4 IPs introduced a new idle mode named smart-idle with wakeup.

This new idlemode replaces the enawakeup for the new IPs but seems to
coexist as well for some legacy IPs (UART, GPIO, MCSPI...)

Add the new SIDLE_SMART_WKUP flag to mark the IPs that support this
capability.
The omap_hwmod_44xx_data.c will have to be updated to add this new flag.

Enable this new mode when applicable in _enable_wakeup, _enable_sysc and
_idle_sysc.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Sebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:31:28 -07:00
Rajendra Nayak
f2dd7e09db OMAP2+: hwmod: Disable clocks when hwmod enable fails
In cases where a module (hwmod) does not become accesible on enabling
the main clocks (can happen if there are external clocks needed
for the module to become accesible), make sure the clocks are not
left enabled.
This ensures that when the requisite external dependencies are met
a omap_hwmod_enable and omap_hwmod_idle/shutdown would rightly enable
and disable clocks using clk framework. Leaving the clocks enabled in
the error case causes additional usecounting at the clock framework
level leaving the clock enabled forever.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:31:28 -07:00
Benoit Cousson
ce35b24469 OMAP2+: hwmod: Remove omap_hwmod_mutex
The hwmod list will be built are init time and never
be modified at runtime. There is no need anymore to protect
the list from concurrent accesses using a mutex.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:31:28 -07:00
Benoit Cousson
01592df950 OMAP2+: hwmod: Mark functions used only during initialization with __init
_register, _find_mpu_port_index and _find_mpu_rt_base are static APIs
that will be used only during the omap_hwmod initialization phase.
There is no need to keep them for runtime.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:31:28 -07:00
Benoit Cousson
0102b62789 OMAP2+: hwmod: Make omap_hwmod_register private and remove omap_hwmod_unregister
Do not allow omap_hwmod_register to be used outside the core
hwmod code. An omap_hwmod should be registered only at init time.
Remove the omap_hwmod_unregister that is not used today since the
hwmod list will be built once at init time and never be modified
at runtime.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:31:27 -07:00
Benoit Cousson
50ebb7772c OMAP2430: hwmod data: Use common dev_attr for i2c1 and i2c2
Since i2c1 and i2c2 are using the same data, remove the two previous
instances and use a common i2c_dev_attr one.

Moreover, that will fix the following warning:
arch/arm/mach-omap2/omap_hwmod_2430_data.c:485:
warning: 'i2c_dev_attr' defined but not used

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Charulatha V <charu@ti.com>
2010-12-21 21:31:00 -07:00
Kevin Hilman
5a7ddcbdaf OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.

This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register.  This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.

This problem was found after discovering that GPIO wakeups were no
longer functional.  The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:

commit: 9980ce53c9
        OMAP: hwmod: Enable module wakeup if in smartidle

commit: 78f26e872f
        OMAP: hwmod: Set autoidle after smartidle during _sysc_enable

There resulting in code in _enable_sysc() was this:

	/*
	 * XXX The clock framework should handle this, by
	 * calling into this code.  But this must wait until the
	 * clock structures are tagged with omap_hwmod entries
	 */
	if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
	    (sf & SYSC_HAS_CLOCKACTIVITY))
		_set_clockactivity(oh, oh->class->sysc->clockact, &v);

	_write_sysconfig(v, oh);

so here, 'v' has wakeups disabled.

	/* If slave is in SMARTIDLE, also enable wakeup */
	if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
		_enable_wakeup(oh);

Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)

	/*
	 * Set the autoidle bit only after setting the smartidle bit
	 * Setting this will not have any impact on the other modules.
	 */
	if (sf & SYSC_HAS_AUTOIDLE) {
		idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
			0 : 1;
		_set_module_autoidle(oh, idlemode, &v);
		_write_sysconfig(v, oh);
	}

And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.

Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:08:34 -07:00
Benoit Cousson
b399bca897 OMAP4: hwmod & clock data: Fix GPIO opt_clks and ocp_if iclk
Fix opt clocks name in clock framework and hwmod.

Add the missing iclk in the ocp_if structure.

Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to ensure
the the GPIO optional clock is enable during reset.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Charulatha V <charu@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:08:34 -07:00
Benoit Cousson
8f25bdc55d OMAP4: hwmod data: Add IVA and DSP
Add IVA and DSP hwmods in order to allow the pm code to
initialize properly the processors devices during
omap2_init_processor_devices.

It will avoid the following warnings.
_init_omap_device: could not find omap_hwmod for iva
_init_omap_device: could not find omap_hwmod for dsp

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:08:34 -07:00
Benoit Cousson
659fa8222c OMAP4: hwmod data: Fix missing address in DMM and EMIF_FW
The DMM is a piece of interconnect that need to be configured properly
for the tiler functionnality. It thus exposes some configuration registers
that were missing previously.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:34 -07:00
Benoit Cousson
0cfe8751bb OMAP4: hwmod data: Add SYSS_HAS_RESET_STATUS flag
Update the data for GPIO, UART, WD_TIMER and I2C in order to
support the new reset status flag introduce in the following
commit:
commit 2cb068149c
OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs

Without this flag properly set, the reset is done, but the hwmod
core code will not wait for the reset completion to continue its
excecution.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Charulatha V <charu@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:08:33 -07:00
Benoit Cousson
3b54baad8a OMAP4: hwmod data: Fix hwmod entries order
The original OMAP4 hwmod data files is fully generated from HW
database. But since the file is introduced incrementaly along
with driver that uses the data, it has to be splitted by the driver
owner and then re-merged by the maintainer.
Because of the similarity of the data, git is completely lost
during such merge and thus the data does not look like the original one
at the end.

Re-order properly the structures to stay in sync with original data set.
This makes it much easier to diff the autogenerated script output with
what's in mainline, see differences, and generate patches for those
diffs.  The goal is to stay in sync with the autogenerated data from now
on.

Add a comment that does contain all the IPs that can have a hwmod, but
do not have it in the file for the moment. It gives a good indication
of the progress.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: updated to apply against current core integration branch,
 commit message slightly amplified; fixed opt_clks_cnt whitespace]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Cc: Charulatha V <charu@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:08:33 -07:00
Janusz Krzysztofik
65ae65c905 OMAP1: clock_data: use runtime cpu / machine checks
Otherwise multi-omap1 configurations may set wrong clock speed.

Created and tested against l-o master on Amstrad Delta.

Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:15 -07:00
Paul Walmsley
1124d2f918 OMAP2/3: SRAM: add comment about crashes during a TLB miss
Some users were observing crashes during the execution of CORE DVFS
code from OCM RAM -- a locally-modified copy of the linux-omap code.
Richard Woodruff tracked this down to a DTLB miss which had been
inadvertently and intermittently caused by the local modifications.
(The TLB miss caused the ARM MMU to attempt to walk the page tables
stored in SDRAM, which was not possible since SDRAM is off-line for a
portion of the CORE DVFS OCM RAM code.)

Add a note to the OMAP2 & OMAP3 CORE DVFS SRAM code to warn others that
changes may result in crashes here if they are not carefully tested.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Nishanth Menon <nm@ti.com>
2010-12-21 21:08:14 -07:00
Paul Walmsley
f1f4b7703f OMAP3: clock: fix incorrect rate display when switching MPU rate at boot
The OMAP3 clock code contains some legacy code to allow the MPU rate
to be specified as a kernel command line parameter.  If the 'mpurate'
parameter is specified, the kernel will attempt to switch the MPU rate
to this rate during boot.  As part of this process, a short message
"Switched to new clocking rate" is generated -- and in this message,
the "Core" clock rate and "MPU" clock rate are transposed.

This patch ensures that the clock rates are displayed in the correct
order.

Thanks to Bruno Guerin <br.guerin@free.fr> for reporting this bug and
proposing a fix.  Thanks to Richard Woodruff <r-woodruff2@ti.com> for
reviewing the problem and passing the report on.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Bruno Guerin <br.guerin@free.fr>
Cc: Richard Woodruff <r-woodruff2@ti.com>
2010-12-21 21:08:14 -07:00
Paul Walmsley
553d239aad OMAP3: clock: clarify usage of struct clksel_rate.flags and struct omap_clk.cpu
Clarify the usage of the struct omap_clk.cpu flags (e.g., CK_*) to use
bits only for individual SoC variants (e.g., CK_3430ES1, CK_3505,
etc.).  Superset flags, such as CK_3XXX or CK_AM35XX, are now defined
as disjunctions of individual SoC variant flags.  This simplifies the
definition and use of these flags.  struct omap_clk record definitions
can now simply specify the bitmask of actual SoCs that the records are
valid for.  The clock init code can simply set a single CPU type mask
bit for the SoC that is currently in use, and test against that,
rather than needing to set some combination of flags.

Similarly, clarify the use of struct clksel_rate.flags.  The bit
allocated for RATE_IN_3XXX has been reassigned, and RATE_IN_3XXX has
been defined as a disjunction of the 34xx and 36xx rate flags.  The
advantages are the same as the above.

Clarify the usage of struct omap_clk.cpu flags such as CK_34XX to only
apply to the SoCs that they name, e.g., OMAP34xx chips.  The previous
practice caused significantly different SoCs, such as OMAP36xx, to be
included in CK_34XX.  In my opinion, this is much more intuitive.

Similarly, clarify the use of struct clksel_rate.flags, such that
RATE_IN_3430ES2PLUS now only applies to 34xx chips with ES level >= 2
- it does not apply to OMAP36xx.

...

At some point, it probably makes sense to collapse the CK_* and
RATE_IN_* flags together into a single bitfield, and possibly use the
existing CHIP_IS_OMAP* flags for platform detection.

...

This all seems to work fine on OMAP34xx and OMAP36xx Beagle.  Not sure
if it works on Sitara or the TI816X, unfortunately I don't have any
here to test with.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:14 -07:00
Paul Walmsley
d4521f6731 OMAP2xxx clock: fix dss2_fck recalc to use clksel
dss2_fck is a clksel clock, and therefore its rate should be recalculated
with the clksel mechanism.  This was working in early 2009, but was one of
the casualties of the big OMAP clock merge between 2.6.29 and 2.6.30.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:14 -07:00
Rajendra Nayak
cb13459b38 OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks
The CORE and PER M3 post dividers are different from the rest of the
DPLL post dividers as in they go to SCRM, and are used
there to export clocks for instance used by external sensor.

There is no automatic HW dependency in PRCM to manage them. Hence these
two clocks (dpll post dividers) should be managed by SW and explicitly
enabled/disabled.

Add control in clock framework to handle that.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:14 -07:00
Rajendra Nayak
e0cb70c565 OMAP4: clock data: Add SCRM auxiliary clock nodes
Add support for auxiliary clocks nodes which are part of SCRM.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 21:08:14 -07:00
Jonathan Bergsagel
768ab94f8b OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck
Add register address, mask and link to the clksel structure that
were missing in the IVA DPLL mux clock node.

Signed-off-by: Jonathan Bergsagel <jbergsagel@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:08:13 -07:00
Thara Gopinath
032b5a7e3a OMAP4: clock data: Add missing DPLL x2 clock nodes
This patch extends the OMAP4 clock data to include
various x2 clock nodes between DPLL and HS dividers as the
clock framework skips a x2 while calculating the dpll locked
frequency.

The clock database extensions are autogenerated using
the scripts maintained by Benoit Cousson.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
[paul@pwsan.com: fixed merge conflicts against v2.6.37-rc5; dropped
 dpll_mpu_x2_ck on advice from Benoît]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:08:13 -07:00
Benoit Cousson
ae4b4fc1bb OMAP3: clock data: Add "wkup_clkdm" in sr1_fck and sr2_fck
The smartreflex modules belong to an ALWON_FCLK clock domain that
does not have any SW control. The gating of that interface clock
is triggered by a transition of the WKUP clock domain to idle.

Attach both smartreflex instances on OMAP3 to the WKUP clock domain.

The missing clock domain field in srX_fck clock nodes was reported by
Kevin during the discussion about smartreflex on OMAP3:
https://patchwork.kernel.org/patch/199342/

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 21:08:13 -07:00
Benoit Cousson
d9b98f5f9e OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk
The gating of pad_clks and slimbus_ck is controlled by the PRCM, but
since the clock source is external, this is the SW responsability
to gate / un-gate it when the mcpdm or slimbus module need to be used.
There is no autogating possible with such external clock.

Add SW control to enable / disable this SW gating in the pad_clks_ck
and slimbus_clk clock node.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:08:13 -07:00
Paul Walmsley
596efe4792 OMAP3: control/PM: move padconf save code to mach-omap2/control.c
Move the padconf save code from pm34xx.c to the System Control Module
code in mach-omap2/control.c.  This is part of the general push to
move direct register access from middle-layer core code to low-level
core code, so the middle-layer code can be abstracted to work on
multiple platforms and cleaned up.

In the medium-to-long term, this code should be called by the mux
layer code, not the PM idle code.  This is because, according to the
TRM, saving the padconf only needs to be done when the padconf
changes[1].

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

1. OMAP34xx Multimedia Device Silicon Revision 3.1.x [Rev. ZH] [SWPU222H]
   Section 4.11.4 "Device Off-Mode Sequences"
2010-12-21 21:05:16 -07:00
Paul Walmsley
72e06d0872 OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
The OMAP powerdomain code and data is all OMAP2+-specific.  This seems
unlikely to change any time soon.  Move plat-omap/include/plat/powerdomain.h
to mach-omap2/powerdomain.h.  The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access powerdomain code
and data directly.

As part of this process, remove the references to powerdomain data
from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
Change the DSPBridge code to point to the new location for the
powerdomain headers.  The DSPBridge code should not be including the
powerdomain headers; these should be removed.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
2010-12-21 21:05:16 -07:00
Paul Walmsley
1540f21406 OMAP2+: clockdomain: move header file from plat-omap to mach-omap2
The OMAP clockdomain code and data is all OMAP2+-specific.  This seems
unlikely to change any time soon.  Move plat-omap/include/plat/clockdomain.h
to mach-omap2/clockdomain.h.  The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access clockdomain code
and data directly.

DSPBridge also uses the clockdomain headers for some reason, so,
modify it also. The DSPBridge code should not be including the
clockdomain headers; these should be removed.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 21:05:15 -07:00
Paul Walmsley
55ae35073b OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses
Reverse some of the effects of commit
84c0c39aec ("ARM: OMAP4: PM: Make OMAP3
Clock-domain framework compatible for OMAP4").  On OMAP2/3, the
CM_CLKSTCTRL register is at a constant offset from the powerdomain's
CM instance.

Also, remove some of the direct CM register access from the
clockdomain code, moving it to the OMAP2/3 CM code instead.  The
intention here is to simplify the clockdomain code.  (The long-term
goal is to move all direct CM register access across the OMAP core
code to the appropriate cm*.c file.)

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 21:05:15 -07:00
Paul Walmsley
bd2122ca35 OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support
Add PRCM partition, CM instance register address offset, and clockdomain
register address offset to each OMAP4 struct clockdomain record.  Add OMAP4
clockdomain code to use this new data to access registers properly.

While here, clean up some nearby clockdomain code to allocate auto variables
in my recollection of Linus's preferred style.

The autogeneration scripts have been updated.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 21:05:15 -07:00
Paul Walmsley
e4156ee52f OMAP4: CM instances: add clockdomain register offsets
In OMAP4 CM instances, some registers (CM_CLKSTCTRL, CM_STATICDEP,
CM_DYNAMICDEP, and the module-specific registers underneath) are
organized by clockdomain.  Add the clockdomain offset macros to the
appropriate PRCM module header files.

This data was almost completely autogenerated from the TI hardware
database; the autogeneration scripts have been updated.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 21:05:15 -07:00
Paul Walmsley
b170fbe1f9 OMAP2+: clockdomains: split the clkdm hwsup enable/disable function
Split _omap2_clkdm_set_hwsup() into _disable_hwsup() and _enable_hwsup().

While here, also document that the autodeps are deprecated and that they
should be removed at the earliest opportunity.

The documentation has been fixed for _{enable,disable}_hwsup(), thanks
to Kevin Hilman <khilman@deeprootsystems.com> for pointing out that those
functions still had placeholder documentation in an earlier patch revision.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:05:15 -07:00
Paul Walmsley
a64bb9cda8 OMAP4: powerdomains: add PRCM partition data; use OMAP4 PRM functions
OMAP4 powerdomain control registers are split between the PRM hardware
module and the PRCM_MPU local PRCM.  Add this PRCM partition
information to each OMAP4 powerdomain record, and convert the OMAP4
powerdomain function implementations to use the OMAP4 PRM instance
functions.

Also fixes a potential null pointer dereference of pwrdm->name.

The autogeneration scripts have been updated.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:05:14 -07:00
Paul Walmsley
c4d7e58fb5 OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
Now that OMAP4-specific PRCM functions have been added, distinguish the
existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_".

This patch should not result in any functional change.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:05:14 -07:00
Paul Walmsley
dac9a77120 OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file
Move the OMAP4 global software reset function to the OMAP4-specific
prm44xx.c file, where it belongs.  Part of the long-term process of
moving all of the direct PRCM register writes into lower-layer code.

Also add OCP barriers on OMAP2/3/4 to reduce the chance that the MPU
will continue executing while the system is supposed to be resetting
itself.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 21:05:14 -07:00
Paul Walmsley
2ace831ffc OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than
the OMAP2/3 PRCM register layout.  For example, on OMAP2/3, from a
register layout point of view, all CM instances were located in the CM
subsystem, and all PRM instances were located in the PRM subsystem.
OMAP4 changes this.  Now, for example, some CM instances, such as
WKUP_CM and EMU_CM, are located in the system PRM subsystem.  And a
"local PRCM" exists for the MPU - this PRCM combines registers that
would normally appear in both CM and PRM instances, but uses its own
register layout which matches neither the OMAP2/3 PRCM layout nor the
OMAP4 PRCM layout.

To try to deal with this, introduce some new functions, omap4_cminst*
and omap4_prminst*.  The former is to be used when writing to a CM
instance register (no matter what subsystem or hardware module it
exists in), and the latter, similarly, with PRM instance registers.
To determine which "PRCM partition" to write to, the functions take a
PRCM instance ID argument.  Subsequent patches add these partition IDs
to the OMAP4 powerdomain and clockdomain definitions.

As far as I can see, there's really no good way to handle these types
of register access inconsistencies.  This patch seemed like the least
bad approach.

Moving forward, the long-term goal is to remove all direct PRCM
register access from the PM code.  PRCM register access should go
through layers such as the powerdomain and clockdomain code that can
hide the details of how to interact with the specific hardware
variant.

While here, rename cm4xxx.c to cm44xx.c to match the naming convention
of the other OMAP4 PRCM files.

Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 21:05:14 -07:00
Paul Walmsley
f0611a5c22 OMAP3: PRM/CM: separate CM context save/restore; remove PRM context save/restore
The OMAP3 PRM module is in the WKUP powerdomain, which is always
powered when the chip is powered, so it shouldn't be necessary to save
and restore those PRM registers.  Remove the PRM register save/restore
code, which should save several microseconds during off-mode
entry/exit, since PRM register accesses are relatively slow.

While doing so, move the CM register save/restore code into
CM-specific code.  The CM module has been distinct from the PRM module
since 2430.

This patch includes some minor changes to pm34xx.c.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:56:50 -07:00
Paul Mundt
7ccbefe07e Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2010-12-22 12:56:10 +09:00
Paul Walmsley
59fb659b06 OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files
In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific
files.  Most of what was in mach-omap2/{cm,prm}.{c,h} has now been
moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was
OMAP2xxx/3xxx-specific.

This process also requires the #includes in each of these files to be
changed to reference the new file name.  As part of doing so, add some
comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use
"sideways includes", to indicate that these users of the PRM/CM includes
should not be doing so.

Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this
patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Acked-by: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 20:01:55 -07:00
Paul Walmsley
cdb54c4457 OMAP4: PRCM: rename _MOD macros to _INST
Back in the OMAP2/3 PRCM interface days, the macros that referred to
the offsets of individual PRM/CM instances from the top of the PRM/CM
hardware modules were incorrectly suffixed with "_MOD".  (They should
have been suffixed with something like "_INST" or "_INSTANCE".)  These
days, now that we have better contact with the OMAP hardware people,
we know that this naming is wrong.  And in fact in OMAP4, there are
actual hardware module offsets inside the instances, so the incorrect
naming gets confusing very quickly for anyone who knows the hardware.

Fix this naming for OMAP4, before things get too far along, by
changing "_MOD" to "_INST" on the end of these macros.  So, for
example, OMAP4430_CM2_INSTR_MOD becomes OMAP4430_CM2_INSTR_INST.

This unfortunately creates quite a large diff, but it is a
straightforward rename.  This patch should not result in any
functional changes.

The autogeneration scripts have been updated accordingly.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:54 -07:00
Benoit Cousson
0f318fd52d OMAP4: PRCM: Add SCRM header file
Add the header file with scrm registers absolute address, offset
and bitfields.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: renamed OMAP4_SCRM to OMAP4_SCRM_BASE]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-12-21 20:01:54 -07:00
Paul Walmsley
d198b514bd OMAP4: PRCM: reorganize existing OMAP4 PRCM header files
Split the existing cm44xx.h file into cm1_44xx.h and cm2_44xx.h files
so they match their underlying OMAP hardware modules.  Add clockdomain
offset information.

Add header files for the MPU local PRCM, prcm_mpu44xx.h, and for the
SCRM, scrm44xx.h.  SCRM register offsets still need to be added; TI
should do this.

Move the "_MOD" macros out of the prcm-common.h header file, into the
header file of the hardware module that they belong to.  For example,
OMAP4430_PRM_*_MOD macros have been moved into the prm44xx.h header.

Adjust #includes of all files that used the old PRCM header file names
to point to the new filenames.

The autogeneration scripts have been updated accordingly.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 20:01:54 -07:00
Paul Walmsley
f5f9d132d1 OMAP3: control/PRCM: move CONTROL_PADCONF_SYS_NIRQ save/restore to SCM code
For some reason, the PRCM context save/restore code also saves and
restores a single System Control Module register,
CONTROL_PADCONF_SYS_NIRQ.  This is probably just an error -- the
register should be handled by SCM code -- so this patch moves it
there.

If this register really does need to be saved and restored before the
rest of the PRCM registers, the code to do so should live in the SCM
code, and the PM code should call this separate function.  This
register pertains to devices with a stacked modem, so this patch is
unlikely to affect most OMAP devices out there.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:53 -07:00
Paul Walmsley
166353bd75 OMAP3: control/PRCM: add omap3_ctrl_write_boot_mode()
Get rid of the open-coded scratchpad write in mach-omap2/prcm.c and
replace it with an actual API, omap3_ctrl_write_boot_mode().  While
there, get rid of the gratuitous omap_writel().

There's not much documentation available for what should wind up in
the scratchpad here, so more documentation would be appreciated.
Also, at some point, we should formalize our treatment of the scratchpad;
right now, accesses to the scratchpad are not well-documented.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 20:01:21 -07:00
Paul Walmsley
dc0b3a7014 OMAP2+: clockdomains: move clockdomain static data to .c files
Static data should be declared in .c files, not .h files.  It should be
possible to #include .h files at any point without creating multiple
copies of the same data.

We converted the clock data to .c files some time ago.  This patch does
the same for the clockdomain data.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:20 -07:00
Paul Walmsley
6e01478ae8 OMAP2+: powerdomains: move powerdomain static data to .c files
Static data should be declared in .c files, not .h files.  It should be
possible to #include .h files at any point without creating multiple
copies of the same data.

We converted the clock data to .c files some time ago.  This patch does
the same for the powerdomain data.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:20 -07:00
Santosh Shilimkar
4b4f62c467 OMAP4: powerdomain: Add pwrdm_clear_all_prev_pwrst
Like OMAP3, OMAP4430 ES2 has additional bitfields in PWRSTST register
which help identify the previous power state entered by the
powerdomain.  Add pwrdm_clear_all_prev_pwrst to the OMAP4 powerdomains
implementation to support this.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: clarified commit message]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:19 -07:00
Rajendra Nayak
9b7fc907d9 OMAP: powerdomain: Arch specific funcs for mem control
Define the following architecture specific funtions for omap2/3/4
.pwrdm_set_mem_onst
.pwrdm_set_mem_retst
.pwrdm_read_mem_pwrst
.pwrdm_read_prev_mem_pwrst
.pwrdm_read_mem_retst
.pwrdm_clear_all_prev_pwrst
.pwrdm_enable_hdwr_sar
.pwrdm_disable_hdwr_sar
.pwrdm_wait_transition
.pwrdm_set_lowpwrstchange

Convert the platform-independent framework to call these functions.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: rearranged Makefile changes]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 20:01:19 -07:00
Rajendra Nayak
1262757852 OMAP: powerdomain: Arch specific funcs for logic control
Define the following architecture specific funtions for omap2/3/4
.pwrdm_set_logic_retst
.pwrdm_read_logic_pwrst
.pwrdm_read_prev_logic_pwrst
.pwrdm_read_logic_retst

Convert the platform-independent framework to call these functions.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:18 -07:00
Rajendra Nayak
f327e07b0e OMAP: powerdomain: Arch specific funcs for state control
Define the following architecture specific funtions for omap2/3/4
.pwrdm_set_next_pwrst
.pwrdm_read_next_pwrst
.pwrdm_read_pwrst
.pwrdm_read_prev_pwrst

Convert the platform-independent framework to call these functions.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: remove remaining static allocations in powerdomains.h file;
 remove path in file header comments, rearranged Makefile changes]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:18 -07:00
Rajendra Nayak
3b1e8b21fc OMAP: powerdomain: Infrastructure to put arch specific code
Put infrastructure in place, so arch specific func pointers
can be hooked up to the platform-independent part of the
framework.
This is in preparation of splitting the powerdomain framework into
platform-independent part (for all omaps) and platform-specific
parts.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:18 -07:00
Rajendra Nayak
74bea6b988 OMAP: powerdomain: Move static allocations from powerdomains.h to a .c file
powerdomains.h header today has only static definitions.  Adding any
function declarations into it and including it in multiple source file
is expected to cause issues.  Hence move all the static definitions
from powerdomains.h file into powerdomains_data.c file.

Also, create a new powerdomain section of the mach-omap2/Makefile, and
rearrange the prcm-common part of the Makefile, now that the
powerdomain code is in its own Makefile section.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: rearrange Makefile changes, tweaked commit message]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
2010-12-21 20:01:17 -07:00
Paul Walmsley
ff2516fbef OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
The OMAP watchdog timer IP blocks require a specific set of register
writes to occur before they will be disabled[1], even if the device
clocks appear to be disabled in the CM_*CLKEN registers.  In the MPU
watchdog case, failure to execute this reset sequence will eventually
cause the watchdog to reset the OMAP unexpectedly.

Previously, the code to disable this watchdog was manually called from
mach-omap2/devices.c during device initialization.  This causes the
watchdog to be unconditionally disabled for a portion of kernel
initialization.  This should be controllable by the board-*.c files,
since some system integrators will want full watchdog coverage of
kernel initialization.  Also, the watchdog disable code was not
connected to the hwmod shutdown code.  This means that calling
omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the
goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip
OMAP device.

To resolve the latter problem, populate the pre_shutdown pointer in
the watchdog timer hwmod classes with a function that executes the
watchdog shutdown sequence.  This allows the hwmod code to fully
disable the watchdog.

Then, to allow some board files to support watchdog coverage
throughout kernel initialization, add common code to mach-omap2/io.c
to cause the MPU watchdog to be disabled on boot unless a board file
specifically requests it to remain enabled.  Board files can do this
by changing the watchdog timer hwmod's postsetup state between the
omap2_init_common_infrastructure() and omap2_init_common_devices()
function calls.

1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH
   [SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using
   WDTi.WSPR Register)"

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 19:57:40 -07:00
Paul Walmsley
81fbc5ef9b OMAP2+: wd_timer: separate watchdog disable code from the rest of mach-omap2/devices.c
Split the wd_timer disable code out into its own file,
mach-omap2/wd_timer.c; it belongs in its own file rather than
cluttering up devices.c.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 19:56:17 -07:00
Rajendra Nayak
233cbe5b94 OMAP2+: hwmod: Update the sysc_cache in case module context is lost
Do not skip the sysc programming in the hmwod framework based
on the cached value alone, since at times the module might have lost
context (due to the Powerdomain in which the module belongs
transitions to either Open Switch RET or OFF).

Identifying if a module has lost context requires atleast one
register read, and since a register read has more latency than
a write, it makes sense to do a blind write always.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-21 19:55:13 -07:00
Paul Walmsley
b56b7bc8d9 OMAP2+: hwmod: fix a warning, add some docs, remove unused fields
Trivial cleanup and documentation changes on the hwmod code and data:

- add some hwmod documentation to indicate flags that should be moved
  outside the static hwmod data in a future patch

- remove some unused fields in the struct omap_hwmod_ocp_if and
  struct omap_hwmod structures

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-21 19:55:13 -07:00
Paul Walmsley
dc6d1cda04 OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock
Change the per-hwmod mutex to a spinlock.  (The per-hwmod lock
serializes most post-initialization hwmod operations such as enable,
idle, and shutdown.)  Spinlocks are needed, because in some cases,
hwmods must be enabled from timer interrupt disabled-context, such as
an ISR.  The current use-case that is driving this is the OMAP GPIO
block ISR: it can trigger interrupts even with its clocks disabled,
but these clocks are needed for register accesses in the ISR to succeed.

This patch also effectively reverts commit
848240223c - this patch makes
_omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
to _enable() and _idle(), and changes their callers to call the
spinlocking versions.  Previously, since omap_hwmod_{enable,init}()
attempted to take mutexes, these functions could not be called while
the timer interrupt was disabled; but now that the functions use
spinlocks and save and restore the IRQ state, it is appropriate to
call them directly.

Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
patch - thanks Kevin.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-21 19:55:12 -07:00
Paul Walmsley
bd36179eec OMAP2+: hwmod: add support for per-class custom device reset functions
The standard omap_hwmod.c _reset() code relies on an IP block's
OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block.  This
works for most IP blocks on the chip, but unfortunately not all.  For
example, initiator-only IP blocks often don't have any MPU-accessible
OCP-header registers, and therefore the MPU can't write to any
OCP_SYSCONFIG registers in that block.  Other IP blocks, such as the
IVA and I2C, require a specialized reset sequence.

Since we need to be able to reset these IP blocks as well, allow
custom IP block reset functions to be passed into the hwmod code via a
per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
If .reset is non-null, then the hwmod _reset() code will call the custom
function instead of the standard OCP SOFTRESET-based code.

As part of this change, rename most of the existing _reset() function
code to _ocp_softreset(), to indicate more clearly that it does not work
for all cases.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Hunt <hunt@ti.com>
Cc: Stanley Liu <stanley_liu@ti.com>
2010-12-21 19:55:12 -07:00
Paul Walmsley
2092e5ccf8 OMAP2+: hwmod: add postsetup state
Allow board files and OMAP core code to control the state that some or
all of the hwmods end up in at the end of _setup() (called by
omap_hwmod_late_init() ).  Reimplement the old skip_setup_idle code in
terms of this new postsetup state code.

There are two use-cases for this patch: the !CONFIG_PM_RUNTIME case,
in which all IP blocks should stay enabled after _setup() finishes;
and the MPU watchdog case, in which the watchdog IP block should enter
idle if watchdog coverage of kernel initialization is desired, and
should be disabled otherwise.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 19:55:12 -07:00
Paul Walmsley
e4dc8f507c OMAP2+: hwmod: allow custom pre-shutdown functions
Some OMAP IP blocks, such as the watchdog timers, cannot be completely
shut down via the standard hwmod shutdown mechanism.  This patch
enables the hwmod data files to supply a pointer to a custom
pre-shutdown function via the struct omap_hwmod_class.pre_shutdown
function pointer.  If the struct omap_hwmod_class.pre_shutdown
function pointer is non-null, the function will be executed before the
existing hwmod shutdown code runs.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
2010-12-21 19:55:11 -07:00
Paul Walmsley
4805734bcc OMAP2+: io: split omap2_init_common_hw()
Split omap2_init_common_hw() into two functions.  The first,
omap2_init_common_infrastructure(), initializes the hwmod code and
data, the OMAP PM code, and the clock code and data.  The second,
omap2_init_common_devices(), handles any other early device
initialization that, for whatever reason, has not been or cannot be
moved to initcalls or early platform devices.

This patch is required for the hwmod postsetup patch, which allows
board files to change the state that hwmods should be placed into at
the conclusion of the hwmod _setup() function.  For example, for a
board whose creators wish to ensure watchdog coverage across the
entire kernel boot process, code to change the watchdog's postsetup
state will be added in the board-*.c file between the
omap2_init_common_infrastructure() and omap2_init_common_devices() function
calls.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-12-21 19:55:11 -07:00
Raghuveer Murthy
5b59cc2fc2 OMAP4: Pandaboard: Fix MMC card detect gpio line
commit bf56f0a666 (2.6.37-rc1), from Nishanth Menon attempted
to fix card detection for PandaBoard, unfortunately, the fix missed
to initialize .gpio_cd member of omap2_hsmmc_info. This results
in a default value of '0', which is a valid GPIO line.
On PandaBoard, the side effect of this is that GPIO line 0 controls
the powering TFP410 DVI chip, and without the fix DVI chip is
inadvertently powered.

Tested-by: David Anders <x0132446@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-21 17:53:15 -08:00
Thomas Weber
79c5f68dc2 OMAP3: Devkit8000: Add DEBUG_LL support
Add support for DEBUG_LL for Devkit8000.
Devkit8000 uses uart 3 for debug output.

Signed-off-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-21 17:53:01 -08:00
Daniel Morsing
d858addf10 OMAP2: Devkit8000: Use _cansleep GPIO functions for displayreset lines
The display reset lines are connected to a TPS65930 which may sleep
when changing GPIO values. Use the appropriate function to silence
a nasty warning from gpiolib.

Signed-off-by: Daniel Morsing <daniel.morsing@gmail.com>
Acked-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-21 17:52:45 -08:00
Tony Lindgren
b9e7683bbc Merge branch 'pm-opp' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus 2010-12-21 17:05:57 -08:00
Tony Lindgren
bb3613aa34 Merge branch 'pm-next' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus 2010-12-21 16:53:00 -08:00
Tony Lindgren
6971071cdd Merge branch 'devel-dma' into omap-for-linus 2010-12-21 16:48:20 -08:00
Jean Pihet
bb1c9034b3 OMAP3: ASM sleep code format rework
Cosmetic fixes to the code:
- white spaces and tabs,
- alignement,
- comments rephrase and typos,
- multi-line comments

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:59 -08:00
Jean Pihet
8352129166 OMAP3: add comments for low power code errata
Errata covered:
- 1.157 & 1.185
- i443
- i581

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:59 -08:00
Jean Pihet
f7dfe3d8a9 OMAP3: rework of the ASM sleep code execution paths
- Reworked and simplified the execution paths for better
  readability and to avoid duplication of code,
- Added comments on the entry and exit points and the interaction
  with the ROM code for OFF mode restore,
- Reworked the existing comments for better readability.

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:58 -08:00
Jean Pihet
1e81bc015a OMAP3: re-organize the ASM sleep code
Organize the code in the following sections:
- register access macros,
- API functions,
- internal functions.

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:58 -08:00
Jean Pihet
fe360e1c86 OMAP3: remove hardcoded values from the ASM sleep code
Using macros from existing include files for registers addresses.

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Based on original patch from Vishwa.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Cc: Vishwanath BS <vishwanath.bs@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:57 -08:00
Jean Pihet
b4b36fd94e OMAP2+: use global values for the SRAM PA addresses
The SRAM PA addresses are locally defined and used at
different places, i.e. SRAM management code and idle sleep code.

The macros are now defined at a centralized place, for
easier maintenance.

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon<nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:56 -08:00
Jean Pihet
d3cdfd2a15 OMAP3: remove unused code from the ASM sleep code
Remove unused code:
- macros,
- variables,
- unused semaphore locking API. This API shall be added back
  when needed,
- infinite loops for debug.

Tested on N900 and Beagleboard with full RET and OFF modes,
using cpuidle and suspend.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon<nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:54 -08:00
Eduardo Valentin
cc1b602887 OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2
Limitation i583: Self_Refresh Exit issue after OFF mode

Issue:
When device is waking up from OFF mode, then SDRC state machine sends
inappropriate sequence violating JEDEC standards.

Impact:
OMAP3630 < ES1.2 is impacted as follows depending on the platform:
CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while
	for all other sysclk frequencies, varied levels of instability
	seen based on varied parameters.
CS1: impacted

This patch takes option #3 as recommended by the Silicon erratum:
Avoid core power domain transitioning to OFF mode. Power consumption
impact is expected in this case.
To do this, we route core OFF requests to RET request on the impacted
revisions of silicon.

Acked-by: Jean Pihet <j-pihet@ti.com>

[nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:53 -08:00
Nishanth Menon
80723c3fe4 OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_mode
Currently omap3_cpuidle_update_states makes whole sale decision
on which C states to update based on enable_off_mode variable
Instead, achieve the same functionality by independently providing
mpu and core deepest states the system is allowed to achieve and
update the idle states accordingly.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[khilman: fixed additional user of this API in OMAP CPUidle driver]
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:52 -08:00
Peter 'p2' De Schrijver
c4236d2e79 OMAP3630: PM: Disable L2 cache while invalidating L2 cache
While coming out of MPU OSWR/OFF states, L2 controller is reseted.
The reset behavior is implementation specific as per ARMv7 TRM and
hence $L2 needs to be invalidated before it's use. Since the
AUXCTRL register is also reconfigured, disable L2 cache before
invalidating it and re-enables it afterwards. This is as per
Cortex-A8 ARM documentation.
Currently this is identified as being needed on OMAP3630 as the
disable/enable is done from "public side" while, on OMAP3430, this
is done in the "secure side".

Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>

Acked-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

[nm@ti.com: ported to 2.6.37-rc2, added hooks to enable the logic only on 3630]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com>
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:51 -08:00
Nishanth Menon
458e999eb1 OMAP3630: PM: Erratum i608: disable RTA
Erratum id: i608
RTA (Retention Till Access) feature is not supported and leads to device
stability issues when enabled. This impacts modules with embedded memories
on OMAP3630

Workaround is to disable RTA on boot and coming out of core off.
For disabling RTA coming out of off mode, we do this by overriding the
restore pointer for 3630 as the first point of entry before caches are
touched and is common for GP and HS devices. To disable earlier than
this could be possible by modifying the PPA for HS devices, but not for
GP devices.

Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>

Acked-by: Jean Pihet <j-pihet@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

[ambresh@ti.com: co-developer]
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:50 -08:00
Nishanth Menon
8cdfd83473 OMAP3: pm: introduce errata handling
Introduce errata handling for OMAP3. This patch introduces
errata variable and stub for initialization which will be
filled up by follow-on patches.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:49 -08:00
Peter 'p2' De Schrijver
9d93b8a2c8 OMAP3: PM: Erratum i581 support: dll kick strategy
Erratum i581 impacts OMAP3 platforms.
PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing
the DPLL not to be locked at times.

IMPORTANT:
*) This is not a complete workaround implementation as recommended
by the silicon erratum. This is a support logic for detecting lockups and
attempting to recover where possible and is known to provide stability
in multiple platforms.
*) This code is mostly important for inactive and retention. The ROM code
waits for the maximum DLL lock time when resuming from off mode. So for
off mode this code isn't really needed.
*) counters are introduced here for eventual export to userspace once the
cleanups are completed.

This should eventually get refactored as part of cleanups to sleep34xx.S

Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>

Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:49 -08:00
Richard Woodruff
0bd4053536 OMAP3: PM: Update clean_l2 to use v7_flush_dcache_all
Analysis in TI kernel with ETM showed that using cache mapped flush
in kernel instead of SO mapped flush cost drops by 65% (3.39mS down
to 1.17mS) for clean_l2 which is used during sleep sequences.
Overall:
	- speed up
	- unfortunately there isn't a good alternative flush method today
	- code reduction and less maintenance and potential bug in
	  unmaintained code

This also fixes the bug with the clean_l2 function usage.

Reported-by: Tony Lindgren <tony@atomide.com>

Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tony Lindgren <tony@atomide.com>

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>

[nm@ti.com: ported rkw's proposal to 2.6.37-rc2]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:45:47 -08:00
Kevin Hilman
53da4ce238 OMAP3: remove OPP interfaces from OMAP PM layer
With new OPP layer, OPP users will access OPP API directly instead of
using OMAP PM layer, so remove all notions of OPPs from the OMAP PM
layer.

Acked-by: Paul Walmsley <paul@pwsan.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:30:40 -08:00
Nishanth Menon
f5a6422d4e omap4: opp: add OPP table data
This patch adds OPP tables for OMAP4. New file has been added to keep
the OMAP4 opp tables and the registration of these tables with the
generic opp framework by OMAP SoC OPP interface.

Based on:
http://dev.omapzoom.org/?p=santosh/kernel-omap4-base.git;a=blob;f=arch/arm/mach-omap2/opp44xx_data.c;h=252e3d0cb6050a64f390b9311c1c4977d74f762a;hb=refs/heads/omap4_next

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:30:40 -08:00
Nishanth Menon
fd1478cd61 omap: opp: add OMAP3 OPP table data and common init
Add OPP data for OMAP34xx and OMAP36xx and initialization functions
to populate OPP tables based on current SoC.
introduce an OMAP generic opp initialization routine which OMAP3
and OMAP4+ SoCs can use to register their OPP definitions.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:30:40 -08:00
Thara Gopinath
1cbbe37ac5 OMAP: pm.c correct the initcall for an early init.
omap2_common_pm_init is the API where generic system devices like
mpu, l3 etc get initialized. This has to happen really early on
during the boot and not at a later time. This is especially important
with the new opp changes as these devices need to be built before the
opp tables init happen. Today both are device initcalls and it works
just because of the order of compilation. Making this postcore_initcall
is ideal because the omap device layer init happens as a core_initcall
and typically rest of the driver/device inits are arch_initcall or
something lower.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:29:34 -08:00
Jean Pihet
c166381d40 OMAP2+: disable idle early in the suspend sequence
Some bad interaction between the idle and the suspend paths has been
identified: the idle code is called during the suspend enter and exit
sequences. This could cause corruption or lock-up of resources.

The solution is to move the calls to disable_hlt at the very beginning
of the suspend sequence (ex. in omap3_pm_begin instead of
omap3_pm_prepare), and the call to enable_hlt at the very end of
the suspend sequence (ex. in omap3_pm_end instead of omap3_pm_finish).

Tested with RET and OFF on Beagle and OMAP3EVM.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-12-21 14:29:34 -08:00
Adrian Hunter
4931445b94 OMAP2/3: OneNAND: add 104MHz support
Add GPMC timings for 104MHz OneNAND.

Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-21 12:05:34 -08:00
Adrian Hunter
a3551f5b0c OMAP2/3: GPMC: put sync_clk value in picoseconds instead of nanoseconds
The calculations done with sync_clk are anyway in picoseconds
and switching to picoseconds allows sync_clk values that are
not a whole number of nanoseconds - which is sometimes the
case.

Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-21 12:05:25 -08:00
Yauhen Kharuzhy
a2255ff451 mmc: at91_mci: fix multiblock SDIO transfers
The AT91 MCI has special SDIO transfer types: SDIO block and SDIO byte
transfers, but at91_mci driver doesn't use them and handles all SDIO
transfers as ordinary MMC block transfers. This causes problems for
multiple-block SDIO transfers (in particular for 256-bytes blocks).

Fix this situation by checking the opcode for SDIO CMD53 and setting
the transfer type in the AT91_MCI_CMDR register properly.

This patch was tested with libertas SDIO driver: problem with TX
timeouts on big packets was eliminated.

Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
Cc: <stable@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
2010-12-21 11:46:32 -08:00
David Brown
c6d92e9b84 Merge branch 'msm-usb' into for-next
* msm-usb:
  MSM: Add USB support for MSM7x30
  MSM: Add USB suport for QSD8x50
2010-12-21 10:53:43 -08:00
Marcelo Roberto Jimenez
b080ac8ad4 ARM: 6459/2: sa1100: Add nanoEngine PCI support.
This patch adds nanoEngine's PCI support.

Signed-off-by: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-21 14:53:46 +00:00
Marcelo Roberto Jimenez
fa87672ab3 ARM: 6458/1: pcmcia: Adds nanoEngine PCMCIA support.
This patch adds nanoEngine PCMCIA support, with support for two sockets.

In order to have a fully functional pcmcia subsystem in a BSE
nanoEngine board you should carefully read this:

http://cambuca.ldhs.cetuc.puc-rio.br/nanoengine/

Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-21 14:53:45 +00:00
Marcelo Roberto Jimenez
47bb3b31ab ARM: 6451/1: sa1100: Fix checkpatch.pl issues in arch/arm/mach-sa1100/cpu-sa1110.c.
This patch fixes checkpatch.pl issues in
arch/arm/mach-sa1100/cpu-sa1110.c.

Signed-off-by: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-21 14:53:39 +00:00
Marcelo Roberto Jimenez
9f15d2caca ARM: 6447/3: sa1100: Put nanoEngine support back in the kernel
Adds Bright Star Engineering's nanoEngine board support to the kernel.
Also:
- Adds the nanoEngine memory chip to arch/arm/mach-sa1100/cpu-sa1110.c
  (Micron MT48LC8M16A2TG-75).
- Increase in the sdram_params->name[] field length to accomodate the
  name of the memory chip.
- Clean up of header content and order of
  arch/arm/mach-sa1100/cpu-sa1110.c

Signed-off-by: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-21 14:53:34 +00:00
Tony Lindgren
4584acc3ee Merge branches 'devel-iommu-mailbox' and 'devel-l2x0' into omap-for-linus 2010-12-20 19:13:40 -08:00
Jarkko Nikula
f0c61d3d3c omap: rx51: Switch rx51_tpa6130a2_data __initdata to__initdata_or_module
If the TPA6130 is compiled as module the id and power_gpio values are
arbitrary at module probing time since the rx51_tpa6130a2_data was marked as
__initdata. Fix this by using __initdata_or_module. Then __initdata is
defined only if the kernel is built without CONFIG_MODULES and omitted
otherwise.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Grazvydas Ignotas
f861fc1766 omap: pandora: fix wifi support
After commit ed919b0 "mmc: sdio: fix runtime PM anomalies by introducing
MMC_CAP_POWER_OFF_CARD" it is required to specify MMC_CAP_POWER_OFF_CARD
to have runtime PM support. As the wl1251 driver expects card to be
powered down when it's not used, wifi will no longer work after interface
is brought down at least once without functioning runtime PM.

Fix this by declaring MMC_CAP_POWER_OFF_CARD for MMC3.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Raghuveer Murthy
d920e52020 OMAP4: Pandaboard: Add omap_reserve functionality
This patch adds omap_reserve functionality to board-omap4panda.c.
Helps in the reserving boot time memory in SDRAM, used here for
framebuffer allocation.

This patch is in similar lines to commit id 71ee7dad9b, from
Russell king

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
[tony@atomide.com: fixed to be before .map_io as pointed out by Russell King]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Hemanth V
f389f4cb46 omap4: Add platform changes for PWM LED
Register TWL6030 PWM, which is used as charging LED

Signed-off-by: Hemanth V <hemanthv@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Hemanth V
d048aca2e2 omap4: Add platform changes for Ambient Light sensor
Register BH1780GLI Ambient light sensor, which is an I2C device
for 4430SDP board.

Signed-off-by: Hemanth V <hemanthv@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Laurent Pinchart
70e7776063 omap3: igepv2: LED gpio-led:green:d1 is active low
Make sure the LED is turned off at boot time, and configure the GPIO LED
device as active low.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Laurent Pinchart
62d8e9e261 omap3: igepv2: Don't call gpio_set_value right aftergpio_direction_output
gpio_direction_output() has a value argument, there's no need to call
gpio_set_value() explicitly right after.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Tony Lindgren
65dd4c1626 omap1: Fix innovator FPGA init for multi-omap
No need to call this early from init_irq. Also recent changes
initialize GPIO now later, so calling gpio_request from init_irq
will make it fail.

While at it, also remove the unnecessary EXPORT_SYMBOL.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Marc Zyngier
da07c0cff2 Fix IGEPv2 second MMC channel power supply
Commit 72f381ba05 (omap3: Remove VMMC2 regulator on IGEP v2)
removed an unused regulator entry, but left the second MMC channel
(used by the Libertas WLAN module) without link to power regulator.
This causes the SDIO module to fail being detected.

This patch adds the two regulators that actually feed the WLAN module
(1v8 from the TWL4030 VIO LDO, and a fixed 3v3). With that patch, the
second channel is properly detected. Details of the power supply
implementation were kindly provided by Enric Balletbo i Serra.

Also change vmmc1 to use symbolic names instead of direct device
reference.

Tested on an IGEPv2 Rev-B.

Signed-off-by: Marc Zyngier <maz@misterjones.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Anand Gadiyar
cd303e1712 omap2430: hwmod: remove stray declaration
Patch "OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430"
in linux-next as of 20101203 introduced the following build
warning - fix this by removing the stray i2c_dev_attr.

arch/arm/mach-omap2/omap_hwmod_2430_data.c:483: warning: 'i2c_dev_attr' defined but not used

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Srikar
60d24eeda7 Added video data to support tvout on rx51
To support tvout on rx51,added Intilization data,
tvout as display device and enabled venc through gpio
on rx51

Signed-off-by: Srikar <ext-srikar.1.bhavanarayana@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Jarkko Nikula
caeeb4aadf omap: rx51: Add supplies and data for codec b part ofTLV320AIC34
Upcoming ASoC core and tlv320aic3x changes makes possible to take b part of
TLV320AIC34 into use on RX51/N900. Prepare to this by adding virtual supplies
and platform data for b part of the codec.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:16 -08:00
Jarkko Nikula
91db7b2985 omap: rx51: Remove extra tlv320aic3x.h inclusion
Remove second tlv320aic3x.h inclusion that came along the commit f0fba2a
"ASoC: multi-component - ASoC Multi-Component Support".

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:15 -08:00
Aaro Koskinen
5690597fc6 arm: mach-omap2: Kconfig: fix incorrect option
There is no MFD config option, MFD_SUPPORT should be selected instead.
This will prevent build errors when trying out different configurations.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:15 -08:00
Aaro Koskinen
434c23a7ef arm: mach-omap2: hsmmc_reset: fix clk_get() error handling
clk_get() return value should be checked with IS_ERR(). Furthermore,
clocks should be put and disabled properly.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:48:15 -08:00
G, Manjunath Kondaiah
f31cc9622d OMAP: DMA: Convert DMA library into platform driver
Convert DMA library into DMA platform driver and make use of
platform data provided by hwmod data base for OMAP2+ onwards.

For OMAP1 processors, the DMA driver in mach-omap uses resource
structures for getting platform data.

Thanks to Tony Lindgren <tony@atomide.com> for fixing various
omap1 issues and testing the same on OSK5912 board.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:31 -08:00
G, Manjunath Kondaiah
59de3cf1ce OMAP2+: DMA: hwmod: Device registration
Prepare OMAP2+ DMA to use hwmod infrastructure so that DMA can register
as platform device.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:30 -08:00
G, Manjunath Kondaiah
6568f7c43a OMAP1: DMA: Implement in platform device model
Implement OMAP1 DMA as platform device and add support for
registering through platform device layer using resource
structures.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:30 -08:00
Benoit Cousson
531ce0d57c OMAP4: hwmod data: add system DMA
Add OMAP4 DMA hwmod data. In addition to original dma hwmod data,
the following changes are added.

1. DMA device attributes structure is introduced for diffenrenciating
OMAP cpu's based on DMA features.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:30 -08:00
G, Manjunath Kondaiah
01438ab6a4 OMAP3: hwmod data: add system DMA
Add OMAP3 DMA hwmod data

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:29 -08:00
G, Manjunath Kondaiah
82cbd1aeba OMAP2430: hwmod data: add system DMA
Add OMAP2430 DMA hwmod data and also add required
DMA device attributes.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:29 -08:00
G, Manjunath Kondaiah
745685df95 OMAP2420: hwmod data: add system DMA
Add OMAP2420 DMA hwmod data and also add required
DMA device attributes.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:29 -08:00
G, Manjunath Kondaiah
d3c9be2f42 OMAP: DMA: Introduce errata handling feature
Implement errata handling to use flags instead of cpu_is_* and
cpu_class_* in the code.

The errata flags are initialized at init time and during runtime we are
using the errata variable (via the IS_DMA_ERRATA macro) to execute the
required errata workaround.

Reused errata handling patch from: Peter Ujfalusi
<peter.ujfalusi@nokia.com>
https://patchwork.kernel.org/patch/231191/

Changes to above patch:
1. Changes are done for converting all the existing errata work arounds
to use this feature.
2. Detailed description for each errata is added.
3. Fixed bug in SET_DMA_ERRATA macro
4. Bit shifting in macro definitions are replaced with BIT() macro

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:29 -08:00
G, Manjunath Kondaiah
a4c537c7f6 OMAP: DMA: Replace read/write macros with functions
Prepare DMA library to get converted into DMA driver using platform
device model and hwmod infrastucture(for omap2+, resource structures
for omap1)

The low level read/write macros are replaced with static inline
functions and register offsets are handled through static register
offset tables mapped through  enumeration constants.

These low level read/write functions along with static register offset
tables will be moved to respective mach-omap dma files in the later
patches of this series.

There are no functionality changes with these changes except change in
logic for handling 16bit registers of OMAP1.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 18:38:29 -08:00
Benoit Cousson
f7bb0d9ab2 I2C: i2c-omap: Change device name: i2c_omap -> omap_i2c
The convention for omap device naming is omap_XXX.

Rename the device and driver name in order to stick
to this naming convention.

Change device name in clock nodes as well.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Ben Dooks <ben-i2c@fluff.org>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 17:53:04 -08:00
Marek Belisko
05f185c774 omap1: pm_bus: Fix compilation warning
Fix following compilation warning:
arch/arm/mach-omap1/pm_bus.c: In function 'omap1_pm_runtime_resume':
arch/arm/mach-omap1/pm_bus.c:51: warning: unused variable 'ret'

Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 17:53:04 -08:00
Marek Belisko
16c8a3b0c1 omap1: htc_herald: Fix compilation warning
Patch fix following compilation warning:
arch/arm/mach-omap1/board-htcherald.c:442:
warning: large integer implicitly truncated to unsigned type

Hopefully this is just a typo.

Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 17:53:04 -08:00
Benoit Cousson
374b8cfd61 omap: serial: Change device name: omap-hsuart -> omap_uart
The naming convention for omap_device is omap_XXX.

Rename the device and driver name in order to stick
to this naming convention.
Remove the hs prefix that is implicit for every OMAP uarts.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Govindraj Raja <govindraj.raja@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-20 17:53:04 -08:00
David Brown
ba119204ff Merge branches 'msm-core' and 'msm-mmc' into for-next
* msm-core: (28 commits)
  msm: initial framebuffer support
  msm: add handling for clocks tagged as CLK_MINMAX
  msm: trout: change name of pmdh_clk to mddi_clk
  msm: add CLK_MINMAX to pmdh_clk
  msm: trout: add gpio_to_irq
  msm: iommu: Use the correct memory allocation flag
  msm_serial: Remove redundant unlikely()
  msm: iommu: Miscellaneous code cleanup
  msm: iommu: Support cache-coherent memory access
  msm: iommu: Definitions for extended memory attributes
  msm: iommu: Kconfig dependency for the IOMMU API
  msm: iommu: Check if device is already attached
  msm: iommu: Kconfig item for cacheable page tables
  msm: iommu: Don't flush page tables if no devices attached
  msm: iommu: Mark functions with the right section names
  msm: iommu: Support for the 2nd GFX core's IOMMU
  msm: iommu: Revise GFX2D0 IOMMU contexts and M2V mappings
  msm: iommu: Revise GFX3D IOMMU contexts and M2V mappings
  msm: iommu: Use more consistent naming in platform data
  msm: iomap: Addresses and IRQs for 2nd GFX core IOMMU
  ...

* msm-mmc: (33 commits)
  mmc: msm_sdcc: Check for only DATA_END interrupt to end a request
  mmc: msm_sdcc: Fix bug in PIO mode when data size is not word aligned
  mmc: msm_sdcc: Reset SDCC in case of data transfer errors
  mmc: msm_sdcc: Add prog done interrupt support
  mmc: msm_sdcc: Fix possible circular locking dependency warning
  msm: initial framebuffer support
  msm: add handling for clocks tagged as CLK_MINMAX
  msm: trout: change name of pmdh_clk to mddi_clk
  msm: add CLK_MINMAX to pmdh_clk
  msm: trout: add gpio_to_irq
  msm: iommu: Use the correct memory allocation flag
  msm_serial: Remove redundant unlikely()
  msm: iommu: Miscellaneous code cleanup
  msm: iommu: Support cache-coherent memory access
  msm: iommu: Definitions for extended memory attributes
  msm: iommu: Kconfig dependency for the IOMMU API
  msm: iommu: Check if device is already attached
  msm: iommu: Kconfig item for cacheable page tables
  msm: iommu: Don't flush page tables if no devices attached
  msm: iommu: Mark functions with the right section names
  ...
2010-12-20 13:11:10 -08:00
Linus Torvalds
92d7c9b231 Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  ARM: mach-shmobile: INTC interrupt priority level demux fix
  ARM: mach-shmobile: fix compile warning in mm/init.c
2010-12-20 09:59:08 -08:00
Linus Torvalds
07058599b4 Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S5PV210: update MAX8998 platform data to get rid of WARN()
  ARM S3C24XX: Fix compilation of PM code for S3C2416
  ARM: S3C24XX: Fix CONFIG_S3C_DEV_NAND Kconfig entry
2010-12-20 09:46:46 -08:00
Russell King
faabfa0816 ARM: SMP: ensure frame pointer is reinitialized for soft-CPU hotplug
When we soft-CPU hotplug a CPU, we reset the stack pointer and
jump back to start_secondary().  This allows us to restart as if
the CPU was actually reset.

However, we weren't resetting the frame pointer, which could cause
problems with backtracing.  Reset the frame pointer to zero (which
means no parent frame) just like the early assembly code also does.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 16:58:19 +00:00
Shawn Guo
1d3f33d541 ARM: mxs: Add build configuration for mxs
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:44 +01:00
Shawn Guo
4afbbb7c1b ARM: mxs: Add initial mx28evk support
Add initial mx28evk support with duart and fec0.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:43 +01:00
Shawn Guo
55cf4183d3 ARM: mxs: Add initial mx23evk support
Add initial mx23evk support with duart.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:29 +01:00
Shawn Guo
b9a2ada8ff ARM: mxs: Dynamically allocate fec devices
Dynamically allocate fec devices for MX28, which gets dual
fec interface.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:24 +01:00
Shawn Guo
dc38ad4052 ARM: mxs: Dynamically allocate duart devices
Dynamically allocate duart devices for MX23 and MX28.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:24 +01:00
Shawn Guo
faff3dc947 ARM: mxs: Add static memory mapping
Create static memory mapping for MX23 and MX28.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:23 +01:00
Shawn Guo
30a7585ff7 ARM: mxs: Add clock support
Add clock for MXS-based SoCs, MX23 and MX28.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:30:22 +01:00
Shawn Guo
bf985969e2 ARM: mxs: Add iomux support
MXS-based SoCs implements iomux functions in block PINCTRL.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:29:58 +01:00
Shawn Guo
fba311fcf0 ARM: mxs: Add gpio support
MXS-based SoCs implement gpio support in block PINCTRL.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:29:51 +01:00
Shawn Guo
4e472096fa ARM: mxs: Add timer support
There are 2 versions of the timrot on Freescale MXS-based SoCs.
The v1 on MX23 only gets 16 bits counter, while v2 on MX28
extends the counter to 32 bits.

The implementation uses two timers, one for clock_event and
another for clocksource. MX28 uses timrot 0 and 1, while MX23
uses 0 and 2.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:29:50 +01:00
Shawn Guo
41fa75bc09 ARM: mxs: Add low-level debug UART support
- DEBUG_LL support, which is incompatible with multi-soc MXS image
   because of different DUART base address on MX23 and MX28
 - uncompress message support

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 17:29:23 +01:00
Paul Mundt
8bcee1832d Merge branch 'rmobile/urgent' into rmobile-latest
Conflicts:
	arch/arm/mach-shmobile/include/mach/entry-macro.S

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-21 00:40:51 +09:00
Magnus Damm
5ce2a2ddb5 ARM: mach-shmobile: Bump up NR_IRQS to 1024
Increase NR_IRQS from 512 to 1024 on SH-Mobile ARM.

Needed to support vectors in the sh73a0 INTCS block.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-21 00:27:55 +09:00
Magnus Damm
6155f77d09 ARM: mach-shmobile: Clean up headsmp.S
Use PAGE_OFFSET and PHYS_OFFSET for secondary_startup
entry point as recommended by Russell King.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-21 00:27:41 +09:00
Yusuke Goda
56e78dafc4 ARM: mach-shmobile: mackerel: Add GPS support
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-21 00:25:31 +09:00
Marek Vasut
59bdd13356 ARM: pxa: Add Balloon3 NAND ready check
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:14:09 +08:00
Marek Vasut
1b9169d8a0 ARM: pxa: Update Balloon3 for new FPGA firmware
The new FPGA firmware in Balloon3 uses different methods to control it's bus
control lines. In the new version, there are separate registers to set/clear
bus control lines. This patch updates affected places.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:14:02 +08:00
Marek Vasut
e60f137b71 ARM: pxa: Fix number of IRQs on Balloon3
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:13:44 +08:00
Russell King
03b505eae6 ARM: SMP: split out software TLB maintainence broadcasting
smp.c is becoming too large, so split out the TLB maintainence
broadcasting into a separate smp_tlb.c file.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:17 +00:00
Russell King
10034aabca ARM: localtimer: clean up local timer on hot unplug
When a CPU is hot unplugged, the generic tick code cleans up the
clock event device, but fails to call down to the device's set_mode
function to actually shut the device down.

To work around this, we've historically had a local_timer_stop()
callback out of the hotplug code.  However, this adds needless
complexity when we have the clock event device itself available.

Explicitly call the clock event device's set_mode function with
CLOCK_EVT_MODE_UNUSED, so that the hardware can be cleanly shutdown
without any special external callbacks.  When/if the generic code
is fixed, percpu_timer_stop() can be killed off.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:16 +00:00
Russell King
e3d9c625f5 ARM: CPU hotplug: fix hard-coded control register constants
Use the definition we've provided in asm/system.h rather than
numeric constants.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:16 +00:00
Russell King
e9882777d9 ARM: CPU hotplug: add Versatile Express hotplug CPU support
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:15 +00:00
Russell King
d4450261e5 ARM: CPU hotplug: fix reporting of spurious wakeups
The original scheme for reporting spurious wakeups was broken - it
tried to use printk() from a context which wasn't coherent with the
other CPUs, which risks corrupting the printk() data.

Fix this by noting the number spurious wakeups, and only report them
when we are properly woken - when we will be coherent with the rest
of the system.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:14 +00:00
Russell King
58613cd1d4 ARM: smp: improve CPU bringup failure diagnostics
We used to print a bland error message which gave no clue as to the
failure when we failed to bring up a secondary CPU.  Resolve this by
separating the two failure cases.

If boot_secondary() fails, we print a message indicating the returned
error code from boot_secondary():
	"CPU%u: failed to boot: %d\n", cpu, ret.

However, if boot_secondary() succeeded, but the CPU did not appear to
mark itself online within the timeout, indicate that it failed to come
online:
	"CPU%u: failed to come online\n", cpu

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:14 +00:00
Russell King
90b44199e8 ARM: VFP: re-initialize VFP coprocessor access enables on CPU hotplug
We can not guarantee that VFP will be enabled when CPU hotplug brings
a CPU back online from a reset state.  Add a hotplug CPU notifier to
ensure that the VFP coprocessor access is enabled whenever a CPU comes
back online.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:13 +00:00
Russell King
3705ff6da5 ARM: Fix subtle race in CPU pen_release hotplug code
There is a subtle race in the CPU hotplug code, where a CPU which has
been offlined can online itself before being requested, which results
in things going astray on the next online/offline cycle.

What happens in the normal online/offline/online cycle is:

	CPU0			CPU3
	requests boot of CPU3
	pen_release = 3
	flush cache line
				checks pen_release, reads 3
				starts boot
				pen_release = -1
	... requests CPU3 offline ...
				... dies ...
				checks pen_release, reads -1
	requests boot of CPU3
	pen_release = 3
	flush cache line
				checks pen_release, reads 3
				starts boot
				pen_release = -1

However, as the write of -1 of pen_release is not fully flushed back to
memory, and the checking of pen_release is done with caches disabled,
this allows CPU3 the opportunity to read the old value of pen_release:

	CPU0			CPU3
	requests boot of CPU3
	pen_release = 3
	flush cache line
				checks pen_release, reads 3
				starts boot
				pen_release = -1
	... requests CPU3 offline ...
				... dies ...
				checks pen_release, reads 3
				starts boot
				pen_release = -1
	requests boot of CPU3
	pen_release = 3
	flush cache line

Fix this by grouping the write of pen_release along with its cache line
flushing code to ensure that any update to pen_release is always pushed
out to physical memory.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:13 +00:00
Dave Martin
ed3768a8d9 ARM: 6516/1: Allow SMP_ON_UP to work with Thumb-2 kernels.
* __fixup_smp_on_up has been modified with support for the
    THUMB2_KERNEL case.  For THUMB2_KERNEL only, fixups are split
    into halfwords in case of misalignment, since we can't rely on
    unaligned accesses working before turning the MMU on.

    No attempt is made to optimise the aligned case, since the
    number of fixups is typically small, and it seems best to keep
    the code as simple as possible.

  * Add a rotate in the fixup_smp code in order to support
    CPU_BIG_ENDIAN, as suggested by Nicolas Pitre.

  * Add an assembly-time sanity-check to ALT_UP() to ensure that
    the content really is the right size (4 bytes).

    (No check is done for ALT_SMP().  Possibly, this could be fixed
    by splitting the two uses ot ALT_SMP() (ALT_SMP...SMP_UP versus
    ALT_SMP...SMP_UP_B) into two macros.  In the first case,
    ALT_SMP needs to expand to >= 4 bytes, not == 4.)

  * smp_mpidr.h (which implements ALT_SMP()/ALT_UP() manually due
    to macro limitations) has not been modified: the affected
    instruction (mov) has no 16-bit encoding, so the correct
    instruction size is satisfied in this case.

  * A "mode" parameter has been added to smp_dmb:

    smp_dmb arm @ assumes 4-byte instructions (for ARM code, e.g. kuser)
    smp_dmb     @ uses W() to ensure 4-byte instructions for ALT_SMP()

    This avoids assembly failures due to use of W() inside smp_dmb,
    when assembling pure-ARM code in the vectors page.

    There might be a better way to achieve this.

  * Kconfig: make SMP_ON_UP depend on
    (!THUMB2_KERNEL || !BIG_ENDIAN) i.e., THUMB2_KERNEL is now
    supported, but only if !BIG_ENDIAN (The fixup code for Thumb-2
    currently assumes little-endian order.)

Tested using a single generic realview kernel on:
	ARM RealView PB-A8 (CONFIG_THUMB2_KERNEL={n,y})
	ARM RealView PBX-A9 (SMP)

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:12 +00:00
Russell King
86e62b9336 ARM: SMP: remove smp_mpidr.h
With "ARM: CPU hotplug: remove bug checks in platform_cpu_die()", we
now do not use hard_smp_processor_id(), we no longer need to read the
hardware processor ID.  Remove the include providing this function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:11 +00:00
Russell King
f36d340122 ARM: CPU hotplug: ensure correct ordering of unplug
Don't call idle_task_exit() with interrupts disabled, and ensure
that we have a memory barrier after interrupts are disabled but
before signalling that this CPU has shut down.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:11 +00:00
Russell King
bbc81fd432 ARM: CPU hotplug: remove bug checks in platform_cpu_die()
platform_cpu_die() is entered from the CPU's own idle thread, which
can not be migrated to other CPUs.  Moreover, the 'cpu' argument
comes from the thread info, which will always be the 'current'
CPU.  So remove this useless bug check.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:10 +00:00
Russell King
3c030beabf ARM: CPU hotplug: move cpu_killed completion to core code
We always need to wait for the dying CPU to reach a safe state before
taking it down, irrespective of the requirements of the platform.
Move the completion code into the ARM SMP hotplug code rather than
having each platform re-implement this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:10 +00:00
Russell King
2c0136dba4 ARM: SMP: consolidate trace_hardirqs_off() into common SMP code
All platforms call trace_hardirqs_off() in their secondary startup code,
so move this into the core SMP code - it doesn't need to be in the
per-platform code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:09 +00:00
Russell King
05c74a6cbc ARM: SMP: consolidate the common parts of smp_prepare_cpus()
There is a certain amount of smp_prepare_cpus() which doesn't belong
in the platform support code - that is, code which is invariant to the
SMP implementation.  Move this code into arch/arm/kernel/smp.c, and
add a platform_ prefix to the original function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:08 +00:00
Russell King
aec66ba1f7 ARM: SMP: get rid of references to poke_milo and Milo
Milo is an old boot loader, which is no longer relevant for these
platforms.  References to it are misleading.  Move the code out
of poke_milo(), and remove references to milo in comments.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:28 +00:00
Russell King
fd778f0ad7 ARM: SMP: get rid of get_core_count()
We don't need this small function as well as scu_get_core_count()

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:27 +00:00
Russell King
8975b6c0fd ARM: SMP: Clean up ncores sanity checks
scu_get_core_count() never returns zero cores, so we don't need to
check and correct if ncores is zero.

Tegra was missing the check against NR_CPUS, leading to a potential
bitfield overflow if this becomes the case.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:27 +00:00
Russell King
bbc3d14e9a ARM: SMP: move CPU number sanity checks to smp_init_cpus()
Ensure that the number of CPUs is sanity checked before setting
the number of possible CPUs.  This avoids any chance of overflowing
the cpu_possible bitmap.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:26 +00:00
Russell King
28e18293cf ARM: SMP: ensure smp_send_stop() waits for CPUs to stop
Wait for CPUs to indicate that they've stopped, after sending the
stop IPI, rather than blindly continuing on and hoping that they've
stopped in time.  Print a warning if we fail to stop the other CPUs.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:26 +00:00
Russell King
0eb0511d17 ARM: SMP: use more sane register allocation for __fixup_smp_on_up
Use r0,r3-r6 rather than r0,r3,r4,r6,r7, which makes it easier to
understand which registers can be modified.  Also document which
registers hold values which must be preserved.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:02 +00:00
Russell King
b54992fe1b ARM: SMP: collect IPI and local timer IRQs for /proc/stat
The IPI and local timer interrupts weren't being properly accounted
for in /proc/stat.  Collect them from the irq_stat structure, and
return their sum.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:01 +00:00
Russell King
4a88abd7b4 ARM: SMP: provide individual IPI interrupt statistics
This separates out the individual IPI interrupt counts from the
total IPI count, which allows better visibility of what IPIs are
being used for.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:01 +00:00
Bjorn Forsman
3534cccd26 ARM: pxa/colibri: setup pins for USB host port 3
Tested on a Colibri Evaluation Board Rev.2.1 with a Colibri PXA310 module.

Signed-off-by: Bjorn Forsman <bjorn.forsman@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-12-20 23:07:50 +08:00
Mark F. Brown
e97d0fac84 ARM: mmp: refactored 5V regulator support using fixed-regulator
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:49 +08:00
Eric Miao
a8fb0b5531 ARM: mmp: correct the naming of GPIOxx_GPIO definitions
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:47 +08:00
Marek Vasut
5fe2acce12 ARM: pxa: Add gpio-leds and vibrator support to PalmTC
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:46 +08:00
Marek Vasut
4c6a832d28 ARM: pxa: Modularize Palm Tungsten|C
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:45 +08:00
Marek Vasut
fd62999bad ARM: pxa: Colibri PXA320 PCMCIA driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:44 +08:00
Eric Miao
c085052bc5 ARM: pxa: add clock for static memory controller
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:43 +08:00
Marek Vasut
a3172e5413 ARM: pxa: Rename Colibri evalboard
Rename colibri-pxa270-evalboard to colibri-evalboard as this board is used with
all Colibri modules.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:42 +08:00
Marek Vasut
072e1ae73c ARM: pxa: Add M41T00 RTC support into Colibri evalboard
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:41 +08:00
Marek Vasut
9b6956f451 ARM: pxa: Push Colibri evalboard MFP into module files
This change -- pushing the MFP configuration back into Module files -- is
necessary because some evalboards can be used with multiple modules, where MFP
differs from module to module. Therefore MFP isn't board-specific, but
module-specific and the module should preconfigure itself for the board.

(And there is also the C preprocesor limitation and conflicting #define-s)

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:40 +08:00
Marek Vasut
960c0acaab ARM: pxa: Toradex Colibri PXA270 CF support
This driver also contains structures to eventually support PXA320. This is
planned to be added in a later patch.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:39 +08:00
Haojian Zhuang
ef6c84454f ARM: pxa: add iwmmx support for PJ4
iwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions
of accessing CP0 and CP1 is changed in PJ4. Append more files to support
iwmmxt in PJ4 core.

Signed-off-by: Zhou Zhu <zzhu3@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20 23:07:36 +08:00
Russell King
f13cd4170e ARM: fix /proc/interrupts formatting
As per x86, align the initial column according to how many IRQs we
have.  Also, provide an english explaination for the 'LOC:' and
'IPI:' lines.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:07:32 +00:00
Russell King
cab8c6f305 ARM: SMP: move ipi_count into irq_stat structure
Move the ipi_count into irq_stat, which allows the ipi_data structure
to be entirely removed.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:06:58 +00:00
Russell King
46c48f222f ARM: SMP: provide accessors for irq_stat data
Provide __inc_irq_stat() and __get_irq_stat() to increment and
read the irq stat counters.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:06:58 +00:00
Russell King
ec405ea9fe ARM: include local timer irq stats only when local timers configured
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:06:57 +00:00
Russell King
e3fbb08765 ARM: SMP: remove send_ipi_message()
send_ipi_message() does nothing except call smp_cross_call().  As
this is a static function, nothing external to this file calls it,
so we can easily clean up this now unnecessary indirection.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:06:56 +00:00
Vincent Guittot
763eef8b5b ux500: add debugfs support for powerdebug
Signed-off-by: Vincent Guittot <vincent.guittot@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-20 13:32:45 +01:00
Russell King
ee81e7a0a8 Merge branch 'kmap_atomic_fixes' of git://git.linaro.org/people/nico/linux 2010-12-20 11:03:35 +00:00
Shawn Guo
289569f902 ARM: mxs: Add interrupt support
Add Interrupt Collector (ICOLL) support for MXS-based.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 10:37:56 +01:00
Shawn Guo
65d7d94405 ARM: mxs: Add reset routines
- The mxs wdog is implemented in RTC block.
 - There is a generic software reset routine for most modules on mxs.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-12-20 10:37:52 +01:00
Jonas Aaberg
3c5728edbe ux500: platsmp: Fix section mismatch
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 21:31:49 +01:00
Sundar Iyer
556fb03869 mach-ux500: add STMPE1601 platform data
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
[Minor fixups to GPIO enumerators]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 20:54:55 +01:00
Sundar Iyer
e43abe6f98 mach-ux500: move keymaps to new file
Move keylayouts to a dedicated file and plug these keylayouts
for input platform data. This will make addition of new and custom
keylayouts localized.

Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 20:51:37 +01:00
Sundar Iyer
611b7590af mfd/tc3589x: add block identifier for multiple child devices
Add block identifier to be able to add multiple mfd clients
to the mfd core

Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 19:27:49 +01:00
Sundar Iyer
20406ebff4 mfd/tc3589x: rename tc35892 structs/registers to tc359x
Most of the register layout, client IRQ numbers on the TC35892 is shared also
by other variants. Make this generic as tc3589x

Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 19:27:46 +01:00
Sundar Iyer
d5d228158e mach-ux500: deprecate spi support for ab8500
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19 19:27:36 +01:00
Nicolas Pitre
6d3e6d3640 ARM: fix cache-feroceon-l2 after stack based kmap_atomic()
Since commit 3e4d3af501 "mm: stack based kmap_atomic()", it is actively
wrong to rely on fixed kmap type indices (namely KM_L2_CACHE) as
kmap_atomic() totally ignores them and a concurrent instance of it may
happily reuse any slot for any purpose.  Because kmap_atomic() is now
able to deal with reentrancy, we can get rid of the ad hoc mapping here.

While the code is made much simpler, there is a needless cache flush
introduced by the usage of __kunmap_atomic().  It is not clear if the
performance difference to remove that is worth the cost in code
maintenance (I don't think there are that many highmem users on that
platform anyway) but that should be reconsidered when/if someone cares
enough to do some measurements.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-12-19 12:57:16 -05:00
Nicolas Pitre
25cbe45440 ARM: fix cache-xsc3l2 after stack based kmap_atomic()
Since commit 3e4d3af501 "mm: stack based kmap_atomic()", it is actively
wrong to rely on fixed kmap type indices (namely KM_L2_CACHE) as
kmap_atomic() totally ignores them and a concurrent instance of it may
happily reuse any slot for any purpose.  Because kmap_atomic() is now
able to deal with reentrancy, we can get rid of the ad hoc mapping here,
and we even don't have to disable IRQs anymore (highmem case).

While the code is made much simpler, there is a needless cache flush
introduced by the usage of __kunmap_atomic().  It is not clear if the
performance difference to remove that is worth the cost in code
maintenance (I don't think there are that many highmem users on that
platform if at all anyway).

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-12-19 12:57:08 -05:00
Nicolas Pitre
39af22a792 ARM: get rid of kmap_high_l1_vipt()
Since commit 3e4d3af501 "mm: stack based kmap_atomic()", it is no longer
necessary to carry an ad hoc version of kmap_atomic() added in commit
7e5a69e83b "ARM: 6007/1: fix highmem with VIPT cache and DMA" to cope
with reentrancy.

In fact, it is now actively wrong to rely on fixed kmap type indices
(namely KM_L1_CACHE) as kmap_atomic() totally ignores them now and a
concurrent instance of it may reuse any slot for any purpose.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-12-19 12:56:46 -05:00
Russell King
132b16325f ARM: AT91: update clock source registration
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants.  Switch over to using this new interface.

Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-19 15:44:53 +00:00
Russell King
40cc524400 ARM: clockevents: fix IOP clock events initialization
Ensure that no interrupt is pending before registering the clock
event device, and properly initialize the periodic tick in the
->set_mode callback.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-19 15:44:53 +00:00
Santosh Shilimkar
b89cd71a15 omap4: l2x0: Enable early BRESP bit
The AXI protocol specifies that the write response can only
be sent back to an AXI master when the last write data has been
accepted. This optimization enables the PL310 to send the write
response of certain write transactions as soon as the store buffer
accepts the write address. This behavior is not compatible with
the AXI protocol and is disabled by default. You enable this
optimization by setting the Early BRESP Enable bit in the
Auxiliary Control Register (bit [30]).

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:33:01 -08:00
Santosh Shilimkar
b0f20ff9d7 omap4: l2x0: Set share override bit
Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:32:55 -08:00
Mans Rullgard
11e0264046 omap4: l2x0: enable instruction and data prefetching
Enabling L2 prefetching improves performance as shown on Panda
ES2.1 board with mem test, and it has measurable impact on
performances. I think we should consider it, even though it damages
"writes" a bit. (rebased to k.org)
Usually the prefetch is used at both levels together L1 + L2, however,
to enable the CP15 prefetch engines, these are under security, and on
GP devices, we cannot enable it(e.g. on PandaBoard). However, just
enabling PL310 prefetch seems to provide performance improvement,
as shown in the data below (from Ubuntu) and would be a great thing
to pull in.

What prefetch does is enable automatic next line prefetching. With this
enabled, whenever the PL310 receives a cachable read request, it
automatically prefetches the following cache line as well.

Measurement Data:
==
STOCK 10.10 WITHOUT PATCH

========================
~# ./memspeed
size    8388608 8192k 8M
offset  8388608, 0
buffers 0x2aaad000 0x2b2ad000
copy  libc          133 MB/s
copy  Android v5    273 MB/s
copy  Android NEON  235 MB/s
copy  INT32         116 MB/s
copy  ASM ARM       187 MB/s
copy  ASM VLDM 64   204 MB/s
copy  ASM VLDM 128  173 MB/s
copy  ASM VLD1      216 MB/s
read  ASM ARM       286 MB/s
read  ASM VLDM      242 MB/s
read  ASM VLD1      286 MB/s
write libc         1947 MB/s
write ASM ARM      1943 MB/s
write ASM VSTM     1942 MB/s
write ASM VST1     1935 MB/s

10.10 + PATCH
=============
~# ./memspeed
size    8388608 8192k 8M
offset  8388608, 0
buffers 0x2ab17000 0x2b317000
copy  libc          129 MB/s
copy  Android v5    256 MB/s
copy  Android NEON  356 MB/s
copy  INT32         127 MB/s
copy  ASM ARM       321 MB/s
copy  ASM VLDM 64   337 MB/s
copy  ASM VLDM 128  321 MB/s
copy  ASM VLD1      350 MB/s
read  ASM ARM       496 MB/s
read  ASM VLDM      470 MB/s
read  ASM VLD1      488 MB/s
write libc         1701 MB/s
write ASM ARM      1682 MB/s
write ASM VSTM     1693 MB/s
write ASM VST1     1681 MB/s

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:32:41 -08:00
Santosh Shilimkar
1773e60a81 omap4: l2x0: Construct the AUXCTRL value using defines
This patch removes the hardcoded value of auxctrl value and
construct it using bitfields

Bit 25 is reserved and is always set to 1. Same value
of this bit is retained in this patch

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:31:59 -08:00
Santosh Shilimkar
0aaa6f8f1d ARM: l2x0: Add aux control register bitfields
This patch adds the PL310 Auxiliary Control Register bitfields
so that SOC's can use these bit fields to construct the AUXCTRL
value to be passed/programmed instead of hardcoding it.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:30:15 -08:00
Russell King
9326845f45 Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into devel-stable 2010-12-18 14:28:31 +00:00
Russell King
2f841ed13b Merge branch 'hw-breakpoint' of git://repo.or.cz/linux-2.6/linux-wd into devel-stable 2010-12-18 14:27:55 +00:00
Russell King
1ae1b5f053 ARM: smp: avoid incrementing mm_users on CPU startup
We should not be incrementing mm_users when we startup a secondary
CPU - doing so results in mm_users incrementing by one each time we
hotplug a CPU, which will eventually wrap, and will cause problems.

Other architectures such as x86 do not increment mm_users, but only
mm_count, so we follow that pattern.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-18 13:57:00 +00:00
Haojian Zhuang
a79a9ad94a ARM: pxa: sanitize IRQ registers access based on offset
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
2010-12-18 21:02:17 +08:00
Haojian Zhuang
3f408fa071 ARM: mmp: select CPU_PJ4
Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2
configuration.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18 21:02:16 +08:00
Haojian Zhuang
c9b5ef47dc ARM: pxa: support saarb platform
Saarb platform is a handheld platform that supports Marvell PXA955 silicon.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18 21:02:15 +08:00
Haojian Zhuang
a4553358d9 ARM: pxa: support pxa95x
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro
CONFIG_PXA95x.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18 21:02:14 +08:00
Eric Miao
aae8224ddd ARM: pxa: introduce pxa3xx_clock_sysclass for clock suspend/resume
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18 21:02:03 +08:00
Tony Lindgren
c7d3e9e801 Merge branch 'for_2.6.38' of git://gitorious.org/iommu_mailbox/iommu_mailbox into devel-iommu-mailbox 2010-12-17 19:19:50 -08:00
Anand Gadiyar
6bc56aaecc omap: remove dead wdt code in plat-omap/devices.c
Commit f2ce623126 (OMAP: WDT: Split OMAP1 and OMAP2PLUS device
registration) removed omap_init_wdt and related structures from
plat-omap/devices.c. However a subsequent commit or merge
seems to have reintroduced these by accident. The caller of
omap_init_wdt was also removed by that commit, and this did
not get restored. So we have the following build warning now:

  CC      arch/arm/plat-omap/devices.o
arch/arm/plat-omap/devices.c:252: warning: 'omap_init_wdt' defined but not used

Fix this by removing this dead code.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:45:03 -08:00
John Rigby
fe297dde5a OMAP4: enable smc instruction in new assembler versions
New assemblers need -march=armv7-a+sec on command line or
.arch_extension sec inline to enable use of the smc instruction.

This patch uses as-instr to check the latter to conditionally
enable the former in AFLAGS for files that use smc.

Checked on both old and new binutils to verify that it does
not break old versions.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:28:07 -08:00
Bryan Wu
1a6b59232b omap: kill all section mismatch warning for omap2plus_defconfig
This patch will kill following section mismatch warnings:

WARNING: vmlinux.o(.text+0x24a00): Section mismatch in reference from the function zoom_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
The function zoom_twl_gpio_setup() references
the (unknown reference) __initdata (unknown).
This is often because zoom_twl_gpio_setup lacks a __initdata
annotation or the annotation of (unknown) is wrong.

WARNING: vmlinux.o(.text+0x24bfc): Section mismatch in reference from the function cm_t35_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
The function cm_t35_twl_gpio_setup() references
the (unknown reference) __initdata (unknown).
This is often because cm_t35_twl_gpio_setup lacks a __initdata
annotation or the annotation of (unknown) is wrong.

WARNING: vmlinux.o(.data+0x1d3e0): Section mismatch in reference from the variable h4_config to the (unknown reference) .init.data:(unknown)
The variable h4_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: vmlinux.o(.data+0x1dc08): Section mismatch in reference from the variable sdp2430_config to the (unknown reference) .init.data:(unknown)
The variable sdp2430_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: vmlinux.o(.data+0x1e1d8): Section mismatch in reference from the variable apollon_config to the (unknown reference) .init.data:(unknown)
The variable apollon_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

Signed-off-by: Bryan Wu <bryan.wu@canonical.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:25:26 -08:00
Ohad Ben-Cohen
7c50152f08 omap: boards w/ wl12xx should select REGULATOR_FIXED_VOLTAGE
Power to the wl12xx wlan device is controlled by a fixed regulator.

Boards that have the wl12xx should select REGULATOR_FIXED_VOLTAGE so
users will not be baffled.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:02:08 -08:00
Jean Pihet
447b8da5d7 OMAP3: add comments for erratas i540 and i478 workarounds
Add comments and IDs for the following erratas:
- i540: MPU cannot exit from Standby,
- i478: Unexpected Cold-Reset is generated when device is coming
   back from OFF mode

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 16:48:20 -08:00
Tony Lindgren
fea83f6a9b Merge branch 'devel-board' into omap-for-linus 2010-12-17 15:14:02 -08:00
Aaro Koskinen
2d200665c3 arm: omap: add minimal support for RM-680
Add minimal support for Nokia RM-680 board.

Tested with omap2plus_defconfig.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
[tony@atomide.com: updated to remove omap_gpio_init
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:47 -08:00
Aaro Koskinen
20dbeb1081 arm: omap: sdram-nokia: add 97.6/195.2 MHz timing data
Introduce 97.6/195.2 MHz memory timing data. Based on patches by Eduardo
Valentin, Igor Dmitriev and Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Cc: Eduardo Valentin <eduardo.valentin@nokia.com>
Cc: Igor Dmitriev <ext-dmitriev.igor@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
15d24e118d arm: omap: sdram-nokia: delete redundant timing data
41.5 MHz SDRAM clock is not usable.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
2b1af87ace arm: omap: sdram-nokia: improve error handling
Actually check for errors: print an error log and return NULL.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
e5f5b5422d arm: omap: sdram-nokia: use array to list timings
Use an array to make it easier to add new values.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:45 -08:00
Aaro Koskinen
fbd208e977 arm: omap: sdram-nokia: prepare for new memory timings
Rename the current timings to indicate they're for 166 MHz. Based on
patches by Eduardo Valentin and Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Cc: Eduardo Valentin <eduardo.valentin@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:45 -08:00
Aaro Koskinen
fcd8d84633 arm: omap: add sdram-nokia.h
Add a header file for Nokia SDRAM functions. Based on patches by Juha
Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:44 -08:00
Aaro Koskinen
6c3bc4eb56 arm: omap: rename board-rx51-sdram.c to sdram-nokia.c
Rename the file and functions so that it can be reused by future Nokia
boards. Based on patches by Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:44 -08:00
Christian Glindkamp
c20b4dd318 at91: Refactor Stamp9G20 and PControl G20 board file
As PControl G20 is a carrier board for the Stamp9G20 SoM, some code can
be shared. Therefore board-stamp9g20.c is refactored to allow reusing the
SoM initialization and board-pcontrol-g20.c is modified to use it.

Signed-off-by: Christian Glindkamp <christian.glindkamp@taskit.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-12-17 12:10:39 +01:00
Ryan Mallon
8251544f9e at91: Fix uhpck clock rate in upll case
The uhpck clock should be divided from the utmi clock, not its parent
(main). This change is mostly cosmetic as the uhpck rate value is not
used anywhere except for the debugfs clock output.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-12-17 12:10:39 +01:00
Yusuke Goda
41491b9adc ARM: mach-shmobile: mackerel: Add mmcif support
v2
 Add comment of J22 and OCR field.

Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-17 19:46:31 +09:00
Magnus Damm
1cf215a5b4 ARM: mach-shmobile: INTC interrupt priority level demux fix
Fix interrupt priority level handling on SH-Mobile ARM.

SH-Mobile ARM platforms using multiple interrupt priority
levels need this patch to fix a potential dead lock that
may occur if multiple interrupts with different levels
are pending simultaneously.

The default INTC configuration is to use the same priority
level for all interrupts, so this issue does not trigger by
default. It is however common for board code to override the
interrupt priority for certain interrupt sources depending
on the application. Without this fix such boards may lock up.

In detail, this patch updates the INTC code in entry-macro.S
to make sure that the INTLVLA register gets set as expected.

To trigger this bug modify the board specific code to adjust
the interrupt priority level for the ethernet chip. After
changing the priority level simply use flood ping to drown
the board with interrupts.

This patch applies to INTCA-based processors such as sh7372,
sh7377 and sh7372. GIC-based processors are not affected.

Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36.

Cc: stable@kernel.org
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-17 19:42:47 +09:00
Magnus Damm
676b14c36d ARM: mach-shmobile: fix compile warning in mm/init.c
Turn down the warning noise from the compiler,
basically a SH-Mobile specific version of the
patch located in the RMK patch tracker:

6484/1: "fix compile warning in mm/init.c",

Without this patch the following warning triggers:

 CC      arch/arm/kernel/sys_arm.o
arch/arm/mm/init.c: In function 'mem_init':
arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'
  CC      arch/arm/kernel/traps.o

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-12-17 19:41:13 +09:00
Marek Szyprowski
cb1868869d ARM: S5PV210: update MAX8998 platform data to get rid of WARN()
This patch adds new entries required by the new version of MAX8998
driver. Without them, the driver fails to init. See commit 50f19a4596

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-17 14:47:42 +09:00
Yauhen Kharuzhy
0f8f9c2b6c ARM S3C24XX: Fix compilation of PM code for S3C2416
S3C2416 PM code uses low-level sleep routines from S3C2412 code,
but these routines are compiled only for S3C2412 SoC.

Split S3C2412_PM to two parts: S3C2412_PM, S3C2412_PM_SLEEP and
select last in S3C2416's Kconfig.

Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-17 14:45:01 +09:00
Kukjin Kim
258b78c364 ARM: S3C24XX: Fix CONFIG_S3C_DEV_NAND Kconfig entry
Should be CONFIG_S3C_DEV_NAND instead of CONFIG_S3C_DEVICE_NAND.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-17 14:44:54 +09:00
Pavankumar Kondeti
5155e2c70f MSM: Add USB support for MSM7x30
Add USB OTG, peripheral and host devices.  This patch also adds
usb_phy_clk which is required for resetting the PHY.  VBUS power up
and shutdown routines depends on PMIC module.  As PMIC driver is
unavailable, configure USB in peripheral only mode.

Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2010-12-16 13:53:39 -08:00
Pavankumar Kondeti
7032d512cf MSM: Add USB suport for QSD8x50
OTG driver takes care of putting hardware into low power mode.  Hence
make peripheral and host devices as children of OTG device and let
runtime PM takes care of notifying peripheral and host state to
OTG device.  VBUS power up and shutdown routines are implemented by
modem processor.  As RPC infrastructure is not available, configure
USB in peripheral only mode.

Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2010-12-16 13:53:39 -08:00
Greg Kroah-Hartman
36facadd9e Merge branch 'usb-next' into musb-merge
* usb-next: (132 commits)
  USB: uas: Use GFP_NOIO instead of GFP_KERNEL in I/O submission path
  USB: uas: Ensure we only bind to a UAS interface
  USB: uas: Rename sense pipe and sense urb to status pipe and status urb
  USB: uas: Use kzalloc instead of kmalloc
  USB: uas: Fix up the Sense IU
  usb: musb: core: kill unneeded #include's
  DA8xx: assign name to MUSB IRQ resource
  usb: gadget: g_ncm added
  usb: gadget: f_ncm.c added
  usb: gadget: u_ether: prepare for NCM
  usb: pch_udc: Fix setup transfers with data out
  usb: pch_udc: Fix compile error, warnings and checkpatch warnings
  usb: add ab8500 usb transceiver driver
  USB: gadget: Implement runtime PM for MSM bus glue driver
  USB: gadget: Implement runtime PM for ci13xxx gadget
  USB: gadget: Add USB controller driver for MSM SoC
  USB: gadget: Introduce ci13xxx_udc_driver struct
  USB: gadget: Initialize ci13xxx gadget device's coherent DMA mask
  USB: gadget: Fix "scheduling while atomic" bugs in ci13xxx_udc
  USB: gadget: Separate out PCI bus code from ci13xxx_udc
  ...
2010-12-16 10:05:06 -08:00
Peter Zijlstra
2e80a82a49 perf: Dynamic pmu types
Extend the perf_pmu_register() interface to allow for named and
dynamic pmu types.

Because we need to support the existing static types we cannot use
dynamic types for everything, hence provide a type argument.

If we want to enumerate the PMUs they need a name, provide one.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <20101117222056.259707703@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-12-16 11:36:43 +01:00
Ingo Molnar
006b20fe4c Merge branch 'perf/urgent' into perf/core
Merge reason: We want to apply a dependent patch.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-12-16 11:22:27 +01:00
Eric Miao
f113fe4e84 ARM: pxa: introduce pxa2xx_clock_sysclass for clock suspend/resume
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:20 +08:00
Eric Miao
2a125dd56b ARM: pxa: remove get_memclk_frequency_10khz()
Introduce 'struct clk' for memory and remove
get_memclk_frequency_10khz().

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Eric Miao
4029813c89 ARM: pxa: separate the clock support into clock-{pxa2xx,pxa3xx}.c
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Eric Miao
2e8581e756 ARM: pxa: replace duplicated macro DEFINE_PXA3_CK() with DEFINE_CK()
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Haojian Zhuang
bb71bdd31b ARM: pxa: redefine irqs.h
Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define
them together. If some IRQs are sharing same name with different IRQ number,
define different IRQ.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Haojian Zhuang
d04e67cd1d ARM: pxa: redefine the cpu_is_pxa3xx
After introducing pxa930/pxa935 and new silicons, original cpuid rules
of XScale generation 3 can't fit new silicons. Now redefine the rule
of PXA3xx.

Only PXA300/PXA310/PXA320/PXA930/PXA935 are family members of PXA3xx.
PXA930/PXA935 are family members of PXA93x. PXA93x can be considered
as PXA3xx + CP.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Haojian Zhuang
d38bdf48f3 ARM: mmp: fix the typo - MMP2 is compatible with ARMv7
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:19 +08:00
Haojian Zhuang
13dee960f3 ARM: mmp: append brownstone support
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16 14:31:18 +08:00